2011-02-14 20:04:45 +01:00
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#*****************************************************************************
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2012-02-16 20:44:20 +01:00
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#
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2011-02-14 20:04:45 +01:00
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# This file is part of the coreboot project.
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2012-02-16 20:44:20 +01:00
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#
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2011-02-14 20:04:45 +01:00
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# Copyright (C) 2011 Advanced Micro Devices, Inc.
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2012-02-16 20:44:20 +01:00
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#
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2011-02-14 20:04:45 +01:00
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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2012-02-16 20:44:20 +01:00
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#
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2011-02-14 20:04:45 +01:00
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#*****************************************************************************
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entries
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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2016-08-11 22:45:55 +02:00
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388 4 h 0 reboot_counter
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2011-02-14 20:04:45 +01:00
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392 3 e 5 baud_rate
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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399 1 e 2 multi_core
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400 1 e 1 power_on_after_fail
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412 4 e 6 debug_level
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440 4 e 9 slow_cpu
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444 1 e 1 nmi
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445 1 e 1 iommu
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2015-02-15 23:45:19 +01:00
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456 1 e 1 ECC_memory
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2011-02-14 20:04:45 +01:00
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728 256 h 0 user_data
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984 16 h 0 check_sum
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# Reserve the extended AMD configuration registers
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1000 24 r 0 amd_reserved
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enumerations
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#ID value text
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1 0 Disable
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1 1 Enable
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2 0 Enable
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2 1 Disable
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4 0 Fallback
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4 1 Normal
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5 0 115200
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5 1 57600
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5 2 38400
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5 3 19200
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5 4 9600
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5 5 4800
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5 6 2400
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5 7 1200
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6 6 Notice
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6 7 Info
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6 8 Debug
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6 9 Spew
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8 0 400Mhz
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8 1 333Mhz
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8 2 266Mhz
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8 3 200Mhz
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9 0 off
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9 1 87.5%
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9 2 75.0%
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9 3 62.5%
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9 4 50.0%
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9 5 37.5%
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9 6 25.0%
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9 7 12.5%
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checksums
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checksum 392 983 984
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