104 lines
3.8 KiB
C
104 lines
3.8 KiB
C
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/*
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* dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
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*
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* Copyright 2006 coresystems GmbH
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* Stefan Reinauer <stepan@coresystems.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <getopt.h>
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int dump_mmcr(void)
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{
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int fd_mem;
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volatile uint8_t *mmcr;
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unsigned long size=4096;
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if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
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perror("Can not open /dev/mem");
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exit(1);
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}
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if (getpagesize() > size) {
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size = getpagesize();
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}
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mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
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fd_mem, (off_t) (0xFFFEF000));
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if (mmcr == MAP_FAILED) {
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perror("Error MMAP /dev/mem");
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exit(1);
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}
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printf("ElanSC520 uC Rev. ID : %04x\n",*(uint16_t *)mmcr);
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printf("Am5x86 CPU Control : %04x\n",*(uint16_t *)(mmcr+2));
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printf("\n");
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printf("SDRAM Control : %04x\n",*(uint16_t *)(mmcr+0x10));
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printf("SDRAM Timing Control : %04x\n",*(uint16_t *)(mmcr+0x12));
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printf("SDRAM Bank Config : %04x\n",*(uint16_t *)(mmcr+0x14));
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printf("SDRAM Bank 0-3 Ending : %04x\n",*(uint16_t *)(mmcr+0x18));
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printf("ECC Control : %04x\n",*(uint16_t *)(mmcr+0x20));
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printf("ECC Status : %04x\n",*(uint16_t *)(mmcr+0x21));
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printf("ECC Check Bit Position: %04x\n",*(uint16_t *)(mmcr+0x22));
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printf("ECC Check Code Test : %04x\n",*(uint16_t *)(mmcr+0x23));
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printf("ECC Single Bit ErrAddr: %04x\n",*(uint16_t *)(mmcr+0x24));
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printf("ECC Multi Bit ErrAddr : %04x\n",*(uint16_t *)(mmcr+0x28));
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printf("\n");
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printf("SDRAM Buffer Control : %04x\n",*(uint16_t *)(mmcr+0x40));
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printf("\n");
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printf("BOOTCS Control : %04x\n",*(uint16_t *)(mmcr+0x50));
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printf("BOOTCS1 Control : %04x\n",*(uint16_t *)(mmcr+0x54));
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printf("BOOTCS2 Control : %04x\n",*(uint16_t *)(mmcr+0x56));
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printf("\n");
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printf("Adr Decode Control : %02x\n",*(uint8_t *)(mmcr+0x80));
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printf("WrProt Violation Stat.: %04x\n",*(uint16_t *)(mmcr+0x82));
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printf("PAR 0 : %08x\n",*(uint32_t *)(mmcr+0x88));
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printf("PAR 1 : %08x\n",*(uint32_t *)(mmcr+0x8C));
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printf("PAR 2 : %08x\n",*(uint32_t *)(mmcr+0x90));
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printf("PAR 3 : %08x\n",*(uint32_t *)(mmcr+0x94));
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printf("PAR 4 : %08x\n",*(uint32_t *)(mmcr+0x98));
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printf("PAR 5 : %08x\n",*(uint32_t *)(mmcr+0x9C));
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printf("PAR 6 : %08x\n",*(uint32_t *)(mmcr+0xA0));
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printf("PAR 7 : %08x\n",*(uint32_t *)(mmcr+0xA4));
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printf("PAR 8 : %08x\n",*(uint32_t *)(mmcr+0xA8));
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printf("PAR 9 : %08x\n",*(uint32_t *)(mmcr+0xAC));
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printf("PAR 10 : %08x\n",*(uint32_t *)(mmcr+0xB0));
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printf("PAR 11 : %08x\n",*(uint32_t *)(mmcr+0xB4));
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printf("PAR 12 : %08x\n",*(uint32_t *)(mmcr+0xB8));
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printf("PAR 13 : %08x\n",*(uint32_t *)(mmcr+0xBC));
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printf("PAR 14 : %08x\n",*(uint32_t *)(mmcr+0xC0));
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printf("PAR 15 : %08x\n",*(uint32_t *)(mmcr+0xC4));
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munmap((void *) mmcr, size);
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return 0;
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}
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int main(int argc, char *argv[])
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{
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dump_mmcr();
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return 0;
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}
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