coreboot-kgpe-d16/src/soc/amd/cezanne/chip.c

/* SPDX-License-Identifier: GPL-2.0-only */

#include <device/device.h>

struct chip_operations soc_amd_cezanne_ops = { NULL };
soc/amd/cezanne: add skeleton for new SoC This is based on the minimal example code in soc/example/min86 and was adapted to use the AMD non-CAR boot block and the common AMD PCI MMCONF support. In its current state this won't even reach the boot block, but will pass the build bot. The missing parts for that will be added in future patches. This is an attempt to not go the usual route to create a copy of a previous SoC generation and the make changes to the code to work for the new SoC, but to start from a nearly empty directory and then add the actual code stage by stage and component by component. Change-Id: I70aeb9ae010e943abfa667a0ea95c6fa9f15b7f5 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> 2020-12-02 14:38:53 +01:00			`/* SPDX-License-Identifier: GPL-2.0-only */`

			`#include <device/device.h>`

			`struct chip_operations soc_amd_cezanne_ops = { NULL };`