198 lines
6.8 KiB
Markdown
198 lines
6.8 KiB
Markdown
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coreboot 4.7 release notes
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==========================
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The 4.7 release covers commit 0a4a4f7ae4 to commit fd470f7163
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Since the last release in April 2017, the coreboot project had 2573 commits by 150 authors.
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There is a pgp signed 4.7 tag in the git repository, and a branch will be created as needed.
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New chipsets
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------------
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* AMD Stoney Ridge
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* Intel i82801jx Southbridge (ICH10)
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* Intel Denverton and Denverton-NS
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* Work has started on Intel Cannon Lake
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Added 47 mainboards & variants:
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-------------------
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* Acer Chromebook 14 CB3-431 [google/edgar] Intel Braswell
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* Acer Chromebook 15 CB3-532 [google/banon] Intel Braswell
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* Acer Chromebook N7 C731 [google/relm] Intel Braswell
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* ASRock B75 Pro3-M Intel Ivy Bridge
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* ASRock G41C-GS R2.0 Intel G41/ICH7
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* Asus AM1I-A AMD Kabini
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* Asus Chromebook C202SA/C300SA/C301SA (google/terra) Intel Braswell
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* Biostar A68N-5200 AMD Kabini
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* Compulab Intense-PC Intel Ivy Bridge
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* Dell Chromebook 11 3180/3189 (google/kefka) Intel Braswell
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* Foxconn G41S-K Intel G41/ICH7
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* Google Coral Intel Apollo Lake
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* Google Grunt AMD Stoney Ridge
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* Google Kahlee AMD Stoney Ridge
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* Google Meowth Intel Cannon Lake
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* Google Nami Intel Kaby Lake
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* Google Nautilus Intel Kaby Lake
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* Google Nefario Rockchip RK3399
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* Google Rainier Rockchip RK3399
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* Google Soraka Intel Kaby Lake
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* Google Zoombini Intel Cannon Lake
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* HP Chromebook 11 G5 (google/setzer) Intel Braswell
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* HP EliteBook 2570p Intel Ivy Bridge
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* HP EliteBook 2760p Intel Sandy Bridge
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* HP EliteBook 8460p Intel Sandy Bridge
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* HP EliteBook 8470p Intel Ivy Bridge
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* HP EliteBook Revolve 810 G1 Intel Ivy Bridge
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* Intel Cannnlake RVPU Intel Cannon Lake
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* Intel Cannonlake RVPY Intel Cannon Lake
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* Intel D410PT Intel Atom D410
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* Intel DG43GT Intel G43/ICH10
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* Intel GLKRVP Intel Gemini Lake
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* Intel Harcuvar Intel Denverton
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* Intel NUC DCP847SKE Intel Sandy Bridge
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* Intel Saddle Brook reference board Intel Skylake
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* Lenovo N22/N42 Chromebook (google/reks) Intel Braswell
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* Lenovo T430 Intel Ivy Bridge
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* Lenovo Thinkpad 11e/Yoga Chromebook G3
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(google/ultima) Intel Braswell
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* Lenovo ThinkPad X131e Intel Sandy Bridge
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* Lenovo Z61T Intel i945/ICH7
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* PC Engines APU3 AMD Steppe Eagle
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* PC Engines APU4 AMD Steppe Eagle
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* PC Engines APU5 AMD Steppe Eagle
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* Purism Librem 13 v2 Intel Skylake
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* Purism Librem 15 v3 Intel Skylake
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* Samsung Chromebook 3 (google/celes) Intel Braswell
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* White label Chromebook (google/wizpig) Intel Braswell
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* WinNET G170 VIA CN700
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Removed 2 mainboards
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--------------
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* Biferos Bifferboard
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* Google Cosmos
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New Embedded Controller
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-----------------------
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* KBC1126 used in HP EliteBooks
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General changes
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---------------
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* Integrate me_cleaner
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* Add flashconsole implementation
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* Build Tianocore UEFI payload from upstream source
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* Remove CMOS NVRAM configurable baud rates
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* A common mrc_cache driver to store romstage settings in SPI flash
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Google ChromeOS devices:
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------------------------
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* Add ACPI USB port definitions for many boards
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* Fix preprocessor guards for LPC TPM
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* Remove non-existent IRQ for LPC TPM
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* Fix LED control for mccloud
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* Enable keyboard backlight at boot on equipped boards
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* Fix ACPI data for non-google EC's to improve Windows compatibility
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* Add missing SPD files for chell, fixing support for > 4GB boards
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Lenovo Thinkpads:
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-----------------
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* Add support for passive cooling
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* Add ACPI fan control
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* Add BDC detection and power saving
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* Unify hybrid graphics and improved power saving
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Intel Braswell:
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---------------
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* Add support for all outstanding Braswell ChromeOS devices
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* Update FSP 1.1 header to v1.1.7.0
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* Adjust FSP header revision check to be less stringent
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* Upstream numerous commits from Chromium tree
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* Fix ACPI scope for I2C devices
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* Fix SPI write after flash lockdown set
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Legacy Intel Boards:
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--------------------
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* Unify Intel VBT handling
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* Add support for loading external VBT
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* Provide the VBT through Intel OpRegion method on all platforms
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* Fix low memory corruption on S3 resume path
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Intel Sandy Bridge:
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------------------
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* Add a Kconfig option to ignore XMP max DIMMs
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* Add Kconfig option for max. DRAM frequency fuses
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* Advertise correct DRAM frequency on Ivy Bridge
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* Improve CAS/frequency selection
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* Use command rate 2T on channels with two DIMMs installed for improved
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stability
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Intel X4X:
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----------
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* Fix booting with FSB800 DDR667 combination
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* Rework ram DQS receiver enable training sequence
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* Rework and fix SPD reading and decoding
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* Allow external GPU to take VGA cycles
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Intel GM45:
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* Improve compatibility with mixed DIMMs
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* Add romstage timings
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* Set the display backlight PWM correctly
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Intel Pineview:
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---------------
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* Enable remapping of memory to allow for 4G or more memory
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Intel I440BX
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------------
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* Implement early CBMEM support
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* Fix RAM init programming
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AMD AGESA
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---------
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* Move boards to early CBMEM and add timestamps
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* Refactor boards away from using agesawrapper
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* Wipe unused sources under vendorcode
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* Re-enable ACPI S3 after fixing low memory corruptions
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AMD binaryPI
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------------
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* Move boards to early CBMEM
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* Continue work on cleaning up headers
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libgfxinit
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----------
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* Support new hardware: Broxton/APL (DP and HDMI only), Skylake
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* Handle framebuffer mapping in the library
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* Make DP training more compatible and tolerant
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* Enhance compatibility for VGA adaptors
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intelmetool
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* Add support for Sunrise Point LP
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* Add Intel Boot Guard detection
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Toolchain
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---------
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* buildgcc now verifies downloaded files against hashes
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* Improve GNAT detection
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* Update binutils to 2.29.1
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