2020-01-29 03:43:28 +01:00
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/*
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* This file is part of the coreboot project.
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*
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include <arch/acpi.h>
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#include "variant/ec.h"
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#include "variant/gpio.h"
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x02, // DSDT revision: ACPI v2.0 and up
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OEM_ID,
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ACPI_TABLE_CREATOR,
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0x20110725 // OEM revision
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)
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{
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#include <soc/intel/tigerlake/acpi/platform.asl>
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// global NVS and variables
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#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
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// CPU
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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{
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#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
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#include <soc/intel/tigerlake/acpi/southbridge.asl>
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}
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}
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// Chrome OS specific
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#include <vendorcode/google/chromeos/acpi/chromeos.asl>
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// Chrome OS Embedded Controller
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Scope (\_SB.PCI0.LPCB)
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{
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// ACPI code for EC SuperIO functions
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#include <ec/google/chromeec/acpi/superio.asl>
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// ACPI code for EC functions
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#include <ec/google/chromeec/acpi/ec.asl>
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}
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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2020-03-20 00:46:38 +01:00
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/* Camera */
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2020-03-25 07:53:08 +01:00
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#include <soc/intel/tigerlake/acpi/ipu.asl>
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2020-03-20 00:46:38 +01:00
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#include "acpi/mipi_camera.asl"
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2020-01-29 03:43:28 +01:00
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}
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