2013-09-18 14:48:37 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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* Copyright (C) 2012 Samsung Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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2014-10-20 22:18:56 +02:00
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#include <soc/trustzone.h>
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2013-09-18 14:48:37 +02:00
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/* Setting TZPC[TrustZone Protection Controller]
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* We pretty much disable it all, as the kernel
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* expects it that way -- and that's not the default.
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*/
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void trustzone_init(void)
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{
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struct exynos_tzpc *tzpc;
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unsigned int addr;
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for (addr = TZPC10_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
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tzpc = (struct exynos_tzpc *)addr;
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if (addr == TZPC0_BASE)
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(&tzpc->r0size, R0SIZE);
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write32(&tzpc->decprot0set, DECPROTXSET);
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write32(&tzpc->decprot1set, DECPROTXSET);
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write32(&tzpc->decprot2set, DECPROTXSET);
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write32(&tzpc->decprot3set, DECPROTXSET);
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2013-09-18 14:48:37 +02:00
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}
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}
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