2012-11-27 19:36:06 +01:00
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/*
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* (C) Copyright 2010 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef _EXYNOS5250_CPU_H
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#define _EXYNOS5250_CPU_H
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2012-11-28 19:03:59 +01:00
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#include <cpu/samsung/exynos5-common/cpu.h>
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2012-11-27 19:36:06 +01:00
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/* EXYNOS5 */
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#define EXYNOS5_GPIO_PART6_BASE 0x03860000 /* Z<6:0> */
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#define EXYNOS5_PRO_ID 0x10000000
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#define EXYNOS5_CLOCK_BASE 0x10010000
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#define EXYNOS5_POWER_BASE 0x10040000
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#define EXYNOS5_SWRESET 0x10040400
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#define EXYNOS5_SYSREG_BASE 0x10050000
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#define EXYNOS5_TZPC1_DECPROT1SET 0x10110810
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#define EXYNOS5_MULTI_CORE_TIMER_BASE 0x101C0000
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#define EXYNOS5_WATCHDOG_BASE 0x101D0000
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#define EXYNOS5_ACE_SFR_BASE 0x10830000
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#define EXYNOS5_DMC_PHY0_BASE 0x10C00000
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#define EXYNOS5_DMC_PHY1_BASE 0x10C10000
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#define EXYNOS5_GPIO_PART4_BASE 0x10D10000 /* V00..V37 */
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#define EXYNOS5_GPIO_PART5_BASE 0x10D100C0 /* V40..V47 */
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#define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
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#define EXYNOS5_GPIO_PART1_BASE 0x11400000 /* A00..Y67 */
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#define EXYNOS5_GPIO_PART2_BASE 0x11400c00 /* X00..X37 */
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#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
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#define EXYNOS5_USBPHY_BASE 0x12130000
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#define EXYNOS5_USBOTG_BASE 0x12140000
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#ifndef CONFIG_OF_CONTROL
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#define EXYNOS5_MMC_BASE 0x12200000
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#define EXYNOS5_MSHC_BASE 0x12240000
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#endif
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#define EXYNOS5_SROMC_BASE 0x12250000
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#define EXYNOS5_UART_BASE 0x12C00000
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#define EXYNOS5_SPI1_BASE 0x12D30000
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#ifndef CONFIG_OF_CONTROL
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#define EXYNOS5_I2C_BASE 0x12C60000
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#define EXYNOS5_SPI_BASE 0x12D20000
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#define EXYNOS5_PWMTIMER_BASE 0x12DD0000
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#define EXYNOS5_SPI_ISP_BASE 0x131A0000
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#endif
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#define EXYNOS5_I2S_BASE 0x12D60000
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#define EXYNOS5_GPIO_PART3_BASE 0x13400000 /* E00..H17 */
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#define EXYNOS5_FIMD_BASE 0x14400000
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#define EXYNOS5_DISP1_CTRL_BASE 0x14420000
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#define EXYNOS5_MIPI_DSI1_BASE 0x14500000
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#define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
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#define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
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/* Compatibility defines */
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#define EXYNOS_POWER_BASE EXYNOS5_POWER_BASE
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/* Marker values stored at the bottom of IRAM stack by SPL */
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#define EXYNOS5_SPL_MARKER 0xb004f1a9 /* hexspeak word: bootflag */
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/* Distance between each Trust Zone PC register set */
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#define TZPC_BASE_OFFSET 0x10000
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2013-01-05 01:29:29 +01:00
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#ifndef __ASSEMBLER__
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2012-11-27 19:36:06 +01:00
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2013-02-03 05:19:58 +01:00
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/* FIXME(dhendrix): cpu_is_exynos5() seems broken atm... */
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#if 0
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2012-11-27 19:36:06 +01:00
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#define SAMSUNG_BASE(device, base) \
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static inline unsigned int samsung_get_base_##device(void) \
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{ \
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return cpu_is_exynos5() ? EXYNOS5_##base : 0; \
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}
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2013-02-03 05:19:58 +01:00
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#endif
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#define SAMSUNG_BASE(device, base) \
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static inline unsigned int samsung_get_base_##device(void) \
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{ \
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return EXYNOS5_##base; \
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}
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2012-11-27 19:36:06 +01:00
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SAMSUNG_BASE(adc, ADC_BASE)
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SAMSUNG_BASE(clock, CLOCK_BASE)
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SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE)
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SAMSUNG_BASE(dsim, MIPI_DSI1_BASE)
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SAMSUNG_BASE(disp_ctrl, DISP1_CTRL_BASE)
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SAMSUNG_BASE(fimd, FIMD_BASE)
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SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
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SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
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SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
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SAMSUNG_BASE(gpio_part4, GPIO_PART4_BASE)
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SAMSUNG_BASE(gpio_part5, GPIO_PART5_BASE)
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SAMSUNG_BASE(gpio_part6, GPIO_PART6_BASE)
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SAMSUNG_BASE(pro_id, PRO_ID)
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#ifndef CONFIG_OF_CONTROL
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SAMSUNG_BASE(mmc, MMC_BASE)
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SAMSUNG_BASE(mshci, MSHC_BASE)
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#endif
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SAMSUNG_BASE(modem, MODEM_BASE)
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SAMSUNG_BASE(sromc, SROMC_BASE)
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SAMSUNG_BASE(swreset, SWRESET)
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SAMSUNG_BASE(sysreg, SYSREG_BASE)
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SAMSUNG_BASE(timer, PWMTIMER_BASE)
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SAMSUNG_BASE(uart, UART_BASE)
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SAMSUNG_BASE(usb_phy, USBPHY_BASE)
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SAMSUNG_BASE(usb_otg, USBOTG_BASE)
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SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
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SAMSUNG_BASE(power, POWER_BASE)
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SAMSUNG_BASE(i2s, I2S_BASE)
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SAMSUNG_BASE(spi1, SPI1_BASE)
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#ifndef CONFIG_OF_CONTROL
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SAMSUNG_BASE(i2c, I2C_BASE)
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SAMSUNG_BASE(spi, SPI_BASE)
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SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
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#endif
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#endif
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#define EXYNOS5_SPI_NUM_CONTROLLERS 5
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#define EXYNOS_I2C_MAX_CONTROLLERS 8
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/* helper function to map mmio address to peripheral id */
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enum periph_id exynos5_get_periph_id(unsigned base_addr);
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#endif /* _EXYNOS5250_CPU_H */
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