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AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
#
# This file is part of the coreboot project.
#
# Copyright (C) 2013-2014 Sage Electronic Engineering, LLC
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
AMD: Isolate AGESA and PI build environments To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
if CPU_AMD_PI
AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
menu "AMD Platform Initialization"
choice
prompt "AGESA source"
AMD: Isolate AGESA and PI build environments To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
default CPU_AMD_AGESA_BINARY_PI if CPU_AMD_PI
AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
default CPU_AMD_AGESA_OPENSOURCE
help
Select the method for including the AMD Platform Initialization
code into coreboot. Platform Initialization code is required for
all AMD processors.
config CPU_AMD_AGESA_BINARY_PI
bool "binary PI"
amd/bettong: Enable fan control 1. Use enable_imc_thermal_zone to enable fan control. 2. The ACPI method ITZE works on Ubuntu 14.04 and Windows 7 but does not work on Windows 8, so I didn't use it. After this issue is fixed, I'll add ACPI_ENABLE_THERMAL_ZONE in bettong/Kconfig. 3. Fan control works on Bettong. I used "APU Validation Toolkit" to test on Windows 8. This tool can put load to APU. The fan's behaviour is just like bettong/fchec.c defined. When the temperature is 40 Celsius, the fan start to run. Change-Id: I0fc22974a7a7cf3f6bdf5f1c66be95219a177e12 Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Reviewed-on: http://review.coreboot.org/10721 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-23 16:43:03 +02:00
select HUDSON_DISABLE_IMC if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00630F01
AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
help
Use a binary PI package. Generally, these will be stored in the
3rdparty: move to 3rdparty/blobs There's now room for other repositories under 3rdparty. Change-Id: I51b02d8bf46b5b9f3f8a59341090346dca7fa355 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10109 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:27:25 +02:00
"3rdparty/blobs" directory. For some processors, these must be obtained
AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
directly from AMD Embedded Processors Group
(http://www.amdcom/embedded).
config CPU_AMD_AGESA_OPENSOURCE
bool "open-source AGESA"
help
Build the PI package ("AGESA") from source code in the "vendorcode"
directory.
endchoice
AMD: Isolate AGESA and PI build environments To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
if CPU_AMD_AGESA_BINARY_PI
vendorcode: Fixup AGESA PI Kconfig variables The *_SELECTED Kconfig variables are not needed with the options contained within "if CPU_AMD_AGESA_BINARY_PI" introduced in e4c17ce8. It also removes the need to source and select the default prior to selecting the AGESA source or AGESA PI option. Change-Id: Iffa366f575f7f155bd6c7e7ece2a985f747c83be Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/10981 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-20 00:20:41 +02:00
source src/vendorcode/amd/pi/Kconfig
AMD: Isolate AGESA and PI build environments To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
endif
AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-11 07:56:45 +02:00
endmenu
endif