2018-09-16 07:27:44 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2019-03-03 07:01:05 +01:00
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#include <device/mmio.h>
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2018-09-16 07:27:44 +02:00
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#include <assert.h>
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#include <delay.h>
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#include <soc/addressmap.h>
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#include <soc/auxadc.h>
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2019-05-15 05:36:45 +02:00
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#include <soc/efuse.h>
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2018-09-16 07:27:44 +02:00
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#include <soc/infracfg.h>
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#include <timer.h>
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static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE;
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2019-05-15 05:36:45 +02:00
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#define ADC_GE_A_SHIFT 10
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#define ADC_GE_A_MASK (0x3ff << ADC_GE_A_SHIFT)
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#define ADC_OE_A_SHIFT 0
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#define ADC_OE_A_MASK (0x3ff << ADC_OE_A_SHIFT)
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#define ADC_CALI_EN_A_SHIFT 20
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#define ADC_CALI_EN_A_MASK (0x1 << ADC_CALI_EN_A_SHIFT)
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static int cali_oe;
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static int cali_ge;
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static int calibrated = 0;
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static void mt_auxadc_update_cali(void)
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{
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uint32_t cali_reg;
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int cali_ge_a;
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int cali_oe_a;
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cali_reg = read32(&mtk_efuse->adc_cali_reg);
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if ((cali_reg & ADC_CALI_EN_A_MASK) != 0) {
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cali_oe_a = (cali_reg & ADC_OE_A_MASK) >> ADC_OE_A_SHIFT;
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cali_ge_a = (cali_reg & ADC_GE_A_MASK) >> ADC_GE_A_SHIFT;
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cali_ge = cali_ge_a - 512;
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cali_oe = cali_oe_a - 512;
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}
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}
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2018-09-16 07:27:44 +02:00
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static uint32_t auxadc_get_rawdata(int channel)
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{
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setbits_le32(&mt8183_infracfg->module_sw_cg_1_clr, 1 << 10);
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2018-11-02 22:48:24 +01:00
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assert(wait_ms(300, !(read32(&mtk_auxadc->con2) & 0x1)));
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2018-09-16 07:27:44 +02:00
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clrbits_le32(&mtk_auxadc->con1, 1 << channel);
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2018-11-02 22:48:24 +01:00
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assert(wait_ms(300, !(read32(&mtk_auxadc->data[channel]) & (1 << 12))));
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2018-09-16 07:27:44 +02:00
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setbits_le32(&mtk_auxadc->con1, 1 << channel);
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udelay(25);
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2018-11-02 22:48:24 +01:00
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assert(wait_ms(300, read32(&mtk_auxadc->data[channel]) & (1 << 12)));
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2018-09-16 07:27:44 +02:00
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uint32_t value = read32(&mtk_auxadc->data[channel]) & 0x0FFF;
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setbits_le32(&mt8183_infracfg->module_sw_cg_1_set, 1 << 10);
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return value;
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}
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int auxadc_get_voltage(unsigned int channel)
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{
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2019-05-15 05:36:45 +02:00
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uint32_t raw_value;
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2018-09-16 07:27:44 +02:00
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assert(channel < 16);
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2019-05-15 05:36:45 +02:00
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if (!calibrated) {
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mt_auxadc_update_cali();
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calibrated = 1;
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}
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2018-09-16 07:27:44 +02:00
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/* 1.5V in 4096 steps */
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2019-05-15 05:36:45 +02:00
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raw_value = auxadc_get_rawdata(channel);
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raw_value = raw_value - cali_oe;
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return (int)((int64_t)raw_value * 1500000 / (4096 + cali_ge));
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2018-09-16 07:27:44 +02:00
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}
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