GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
coreboot-kgpe-d16/payloads/libpayload/configs/defconfig-arm

79 lines
1.8 KiB
Plaintext
Raw Normal View History

libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
#
# Automatically generated make config: don't edit
# libpayload version: 0.2.0
libpayload: arch/mips: Add basic MIPS architecture support Add the basic build infrastructure and architectural support required to build for targets using the MIPS architecture. This will require the addition of cache maintenance. BUG=chrome-os-partner:31438 TEST=tested on Pistachio FPGA with Depthcharge as payload; successfully executed payload. BRANCH=none Change-Id: I75cfd0536860b6d84b53a567940fe6668d9b2cbb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 758c8cb9a6846e6ca32be409ec5f7a888ac9c888 Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Original-Change-Id: I0b9af983bf5032335a519ce2510a0b3aca082edf Original-Reviewed-on: https://chromium-review.googlesource.com/219740 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8741 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-09-24 18:05:33 +02:00
# Wed Mar 18 16:11:16 2015
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
#
#
# Generic Options
#
libpayload: Introduce new Kconfig to explicitly allow GPL code There have been leaks of GPL code into libpayload for a while now, for new features or improvements that require third party code with no adequate alternative among BSD-licensed software. It seems silly and counter-productive to keep holding back features and performance improvements from libpayload for a use-case (proprietary payloads) that doesn't even seem to be implemented anywhere to date. Open-source payloads should not need to suffer to appease commercial ones. Instead, this patch introduces a new Kconfig option to explicitly allow inclusion of GPL code. It will use Kconfig dependencies and/or Makefile rules to ensure that no GPL code can end up in the final payload if that option is unset, allowing proprietary payloads to keep working with the existing BSD-licensed feature set. New features and patches (that are sufficiently separate and self-contained to allow guarding through this config option) can choose whether to import GPL code, and need to depend on this option if they do. Also clean up all (known) existing uses of GPL code to depend on the new option, add some recent third-party imports to the LICENSES file, and relicense the selfboot.c files to BSD with permission of the author. BUG=chrome-os-partner:24957 TEST=Compiled Falco and Nyan_Big both with and without the new option, disassembled output binaries to ensure that memcpy() looks as expected. Original-Change-Id: I6e3a75b1a8e46291c75a876844c7a01f7d3f2a0e Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/203513 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit d8e5a9fdf583b5ac861f34baea6a16c4d8536512) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I446fef028264c793b946dd9f765e446bf708b4db Reviewed-on: http://review.coreboot.org/8118 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-06-11 23:16:35 +02:00
# CONFIG_LP_GPL is not set
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
# CONFIG_LP_EXPERIMENTAL is not set
# CONFIG_LP_OBSOLETE is not set
# CONFIG_LP_DEVELOPER is not set
# CONFIG_LP_CHROMEOS is not set
#
# Architecture Options
#
ARM: Generalize armv7 as arm. There are ARM systems which are essentially heterogeneous multicores where some cores implement a different ARM architecture version than other cores. A specific example is the tegra124 which boots on an ARMv4 coprocessor while most code, including most of the firmware, runs on the main ARMv7 core. To support SOCs like this, the plan is to generalize the ARM architecture so that all versions are available, and an SOC/CPU can then select what architecture variant should be used for each component of the firmware; bootblock, romstage, and ramstage. Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171338 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> ARM: Split out ARMv7 code and make it possible to have other arch versions. We don't always want to use ARMv7 code when building for ARM, so we should separate out the ARMv7 code so it can be excluded, and also make it possible to include code for some other version of the architecture instead, all per build component for cases where we need more than one architecture version at a time. The tegra124 bootblock will ultimately need to be ARMv4, but until we have some ARMv4 code to switch over to we can leave it set to ARMv7. Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7 Reviewed-on: https://chromium-review.googlesource.com/171400 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483) Squashed two related patches for splitting ARM support into general ARM support and ARMv7 specific pieces. Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6782 Tested-by: build bot (Jenkins)
2013-10-01 08:00:33 +02:00
CONFIG_LP_ARCH_ARM=y
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
# CONFIG_LP_ARCH_X86 is not set
libpayload: Add support for arm64 in libpayload Basic support for arm64 is enabled in libpayload. Features added: 1) mem* operations in assembly. 2) Basic exception handling and support for testing exceptions. 3) Caching support. Tested with arm64-generic board compilation. BUG=None BRANCH=None TEST=Compilation successful Original-Change-Id: I4e86301f9c6383abc078e2b70071fb84bd6e4741 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/187067 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit a70d13f3d225535843ab352290eab2e1ec7a9b4b) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ie3affe6a2bdd4fed3058de739d4c6aa573e5b251 Reviewed-on: http://review.coreboot.org/8063 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2014-02-19 20:35:30 +01:00
# CONFIG_LP_ARCH_ARM64 is not set
libpayload: arch/mips: Add basic MIPS architecture support Add the basic build infrastructure and architectural support required to build for targets using the MIPS architecture. This will require the addition of cache maintenance. BUG=chrome-os-partner:31438 TEST=tested on Pistachio FPGA with Depthcharge as payload; successfully executed payload. BRANCH=none Change-Id: I75cfd0536860b6d84b53a567940fe6668d9b2cbb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 758c8cb9a6846e6ca32be409ec5f7a888ac9c888 Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Original-Change-Id: I0b9af983bf5032335a519ce2510a0b3aca082edf Original-Reviewed-on: https://chromium-review.googlesource.com/219740 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8741 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-09-24 18:05:33 +02:00
# CONFIG_LP_ARCH_MIPS is not set
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
#
# Standard Libraries
#
CONFIG_LP_LIBC=y
CONFIG_LP_CURSES=y
CONFIG_LP_TINYCURSES=y
# CONFIG_LP_PDCURSES is not set
CONFIG_LP_CBFS=y
CONFIG_LP_LZMA=y
#
# Console Options
#
# CONFIG_LP_SKIP_CONSOLE_INIT is not set
CONFIG_LP_CBMEM_CONSOLE=y
CONFIG_LP_SERIAL_CONSOLE=y
ARM: Generalize armv7 as arm. There are ARM systems which are essentially heterogeneous multicores where some cores implement a different ARM architecture version than other cores. A specific example is the tegra124 which boots on an ARMv4 coprocessor while most code, including most of the firmware, runs on the main ARMv7 core. To support SOCs like this, the plan is to generalize the ARM architecture so that all versions are available, and an SOC/CPU can then select what architecture variant should be used for each component of the firmware; bootblock, romstage, and ramstage. Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171338 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> ARM: Split out ARMv7 code and make it possible to have other arch versions. We don't always want to use ARMv7 code when building for ARM, so we should separate out the ARMv7 code so it can be excluded, and also make it possible to include code for some other version of the architecture instead, all per build component for cases where we need more than one architecture version at a time. The tegra124 bootblock will ultimately need to be ARMv4, but until we have some ARMv4 code to switch over to we can leave it set to ARMv7. Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7 Reviewed-on: https://chromium-review.googlesource.com/171400 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483) Squashed two related patches for splitting ARM support into general ARM support and ARMv7 specific pieces. Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6782 Tested-by: build bot (Jenkins)
2013-10-01 08:00:33 +02:00
# CONFIG_LP_8250_SERIAL_CONSOLE is not set
libpayload: Update defconfigs Update x86 and ARM defconfig. Adds default N to specific timer and serial drivers. Change-Id: Ida6b953565dc6053729c2a72c6342d86596c599b Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7449 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-11-12 22:58:31 +01:00
# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 We have two drivers for a 100%-identical peripheral right now, mostly because we couldn't come up with a good common name for it back when we checked it in. That seems like a pretty silly reason in the long run. Both Tegra and Rockchip SoCs contain UARTs that use the common 8250 register interface (at least for the very basic byte-per-byte transmit and receive parts we care about), memory-mapped with a 32-bit register stride. This patch combines them to a single 8250_mmio32 driver (which also fixes a problem when booting Rockchip without serial enabled, since that driver forgot to check for serial initialization when registering its console drivers). The register accesses are done using readl/writel (as Rockchip did before), since the registers are documented as 32-bit length (with top 24 bits RAZ/WI), although the Tegra SoC doesn't enforce APB accesses to have the full word length. Also fixed checkpatch stuff. A day may come when we can also merge this driver into the (completely different, with more complicated features and #ifdefs) 8250 driver for x86 (which has MMIO support for 8-bit register stride only), both here and in coreboot. But it is not this day. This day I just want to get rid of a 99% identical file without expending too much effort. BUG=None TEST=Booted on Veyron_Pinky and Nyan_Blaze with and without serial enabled, both worked fine (although Veyron has another kernel issue). Change-Id: I85c004a75cc5aa7cb40098002d3e00a62c1c5f2d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e7959c19356d2922aa414866016540ad9ee2ffa8 Original-Change-Id: Ib84d00f52ff2c48398c75f77f6a245e658ffdeb9 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225102 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9387 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-22 23:12:50 +02:00
# CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE is not set
libpayload: ipq808x: introduce uart driver This adds a UART driver for the ipq8064 controller. It still does not quite work in the receive direction - the receive FIFO returns read data in 32 bit chunks, which means that 4 keys need to be pressed before a character pops out of the driver (and it reports it as a single character). This issue is being addressed separately, the driver is being checked in to facilitate concurrent development. BUG=chrome-os-partner:27784, chrome-os-partner:29313 TEST=with deptcharge modifications in place, the AP148 board comes up to the depthcharge prompt: Starting depthcharge on storm... Original-Change-Id: Ief2cfcca73494be5c4147881144470078adcefb8 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/202045 Original-Reviewed-by: Deepa Dinamani <deepad@codeaurora.org> Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit 4499318fb9a4e663c504d7c41380ccf2aa89da29) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I3e07d7568c20c0e570222971ff219de3a6d9b7cc Reviewed-on: http://review.coreboot.org/8061 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-05-28 03:28:59 +02:00
# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
# CONFIG_LP_SERIAL_SET_SPEED is not set
# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
CONFIG_LP_VIDEO_CONSOLE=y
# CONFIG_LP_COREBOOT_VIDEO_CONSOLE is not set
libpayload: Remove PC Keyboard from ARM build The keyboard.c uses IO cycles to access the legacy PC keyboard device. ARM can't do IO cycles, so remove the option for ARM configs. Change-Id: Ifc6c2368563f27867f4babad5afdde0e78f4cf78 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7922 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-23 23:22:30 +01:00
# CONFIG_LP_PC_KEYBOARD is not set
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
#
# Drivers
#
# CONFIG_LP_RTC_PORT_EXTENDED_VIA is not set
CONFIG_LP_STORAGE=y
# CONFIG_LP_STORAGE_64BIT_LBA is not set
CONFIG_LP_STORAGE_ATA=y
CONFIG_LP_STORAGE_ATAPI=y
libpayload: Update defconfigs Update x86 and ARM defconfig. Adds default N to specific timer and serial drivers. Change-Id: Ida6b953565dc6053729c2a72c6342d86596c599b Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7449 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-11-12 22:58:31 +01:00
CONFIG_LP_TIMER_NONE=y
# CONFIG_LP_TIMER_MCT is not set
# CONFIG_LP_TIMER_TEGRA_1US is not set
libpayload: ipq8064: Add rudimentary timer driver This is still using the 32kHz timer coreboot uses. A finer granularity timer implementation for 806x is in the works. BUG=chrome-os-partner:27784,chrome-os-partner:28880 TEST=none yet. Original-Change-Id: Iae206749000d45040090df48199c8d86d76bbae5 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/198021 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 8f49f752ab8f84b7c5dc189238732360e8d2aae2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia150c974e5b66939de0b007cf7c1308c187f3289 Reviewed-on: http://review.coreboot.org/8002 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-05-22 01:28:57 +02:00
# CONFIG_LP_TIMER_IPQ806X is not set
libpayload: Add Rock Chip drivers Add support: 1)Support driver rktimer 2)Support driver rkserial BUG=chrome-os-partner:29778 TEST=emerge-veyron libpayload Original-Change-Id: I2cccedf3b62883dd372842a7972e93f2ebbfb282 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/206184 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> (cherry picked from commit 387450d7c36b201bd177d46eb9f1d280fc043aab) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia6b7a8ee2439a6f2bf7577df822d3f4f3a1e441c Reviewed-on: http://review.coreboot.org/8127 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-06-20 05:34:46 +02:00
# CONFIG_LP_TIMER_RK is not set
libpayload: arch/mips: Add basic MIPS architecture support Add the basic build infrastructure and architectural support required to build for targets using the MIPS architecture. This will require the addition of cache maintenance. BUG=chrome-os-partner:31438 TEST=tested on Pistachio FPGA with Depthcharge as payload; successfully executed payload. BRANCH=none Change-Id: I75cfd0536860b6d84b53a567940fe6668d9b2cbb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 758c8cb9a6846e6ca32be409ec5f7a888ac9c888 Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Original-Change-Id: I0b9af983bf5032335a519ce2510a0b3aca082edf Original-Reviewed-on: https://chromium-review.googlesource.com/219740 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8741 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-09-24 18:05:33 +02:00
# CONFIG_LP_TIMER_BG4CD is not set
# CONFIG_LP_TIMER_IMG_PISTACHIO is not set
libpayload: Add ARM defconfig make junit.xml tries to build it, but fails (ARM port doesn't seem to be ready?) Useful test case to demonstrate a failing libpayload build. Change-Id: Iba4fe551b48f631e6a3bd90eb07930fc70761332 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4552 Tested-by: build bot (Jenkins) Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-21 21:39:37 +01:00
CONFIG_LP_USB=y
CONFIG_LP_USB_OHCI=y
CONFIG_LP_USB_EHCI=y
CONFIG_LP_USB_XHCI=y
CONFIG_LP_USB_HID=y
CONFIG_LP_USB_HUB=y
CONFIG_LP_USB_MSC=y
CONFIG_LP_USB_GEN_HUB=y
# CONFIG_LP_USB_PCI is not set
# CONFIG_LP_BIG_ENDIAN is not set
CONFIG_LP_LITTLE_ENDIAN=y
# CONFIG_LP_IO_ADDRESS_SPACE is not set
CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y