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coreboot-kgpe-d16/util/amdfwtool/amdfwtool.c

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amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
/*
* This file is part of the coreboot project.
*
util/amdfwtool: Fix duplicate long option name Make the PSP2 smufirmware2 name unique so the command-line option gets picked up. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: <marcj303@gmail.com> (cherry picked from commit 98cf3880797f72aeb7169c3f8718a10092af9624) Change-Id: I5430cf8b81fb03c95e6ee9d7e53455e6224256ff Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17146 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-08 22:49:41 +02:00
* Copyright (C) 2015 - 2016 Advanced Micro Devices, Inc.
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* ROMSIG At ROMBASE + 0x20000:
amdfwtool: Postpone the usage of PSP combo directory If we only need to "combo" two PSP directories into one image, we can put first address in romsig 0x10 and second one in romsig 0x14. If we really need to put three, the 0x14 is the combo directory which points to multiple level-2 PSP directories. I guess that two PSP can also use combo directory, with only one level-2 directory. But nobody seems to do that. Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13739 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:47:31 +01:00
* 0 4 8 C
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
* +------------+---------------+----------------+------------+
* | 0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
* +------------+---------------+----------------+------------+
amdfwtool: Postpone the usage of PSP combo directory If we only need to "combo" two PSP directories into one image, we can put first address in romsig 0x10 and second one in romsig 0x14. If we really need to put three, the 0x14 is the combo directory which points to multiple level-2 PSP directories. I guess that two PSP can also use combo directory, with only one level-2 directory. But nobody seems to do that. Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13739 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:47:31 +01:00
* | PSPDIR ADDR|PSPDIR ADDR |<-- Field 0x14 could be either
* +------------+---------------+ 2nd PSP directory or PSP COMBO directory
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
* EC ROM should be 64K aligned.
*
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
* PSP directory (Where "PSPDIR ADDR" points)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
* +------------+---------------+----------------+------------+
* | 'PSP$' | Fletcher | Count | Reserved |
* +------------+---------------+----------------+------------+
* | 0 | size | Base address | Reserved | Pubkey
* +------------+---------------+----------------+------------+
* | 1 | size | Base address | Reserved | Bootloader
* +------------+---------------+----------------+------------+
* | 8 | size | Base address | Reserved | Smu Firmware
* +------------+---------------+----------------+------------+
* | 3 | size | Base address | Reserved | Recovery Firmware
* +------------+---------------+----------------+------------+
* | |
* | |
* | Other PSP Firmware |
* | |
* | |
* +------------+---------------+----------------+------------+
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
*
amdfwtool: Postpone the usage of PSP combo directory If we only need to "combo" two PSP directories into one image, we can put first address in romsig 0x10 and second one in romsig 0x14. If we really need to put three, the 0x14 is the combo directory which points to multiple level-2 PSP directories. I guess that two PSP can also use combo directory, with only one level-2 directory. But nobody seems to do that. Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13739 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:47:31 +01:00
* PSP Combo directory
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
* +------------+---------------+----------------+------------+
amdfwtool: Fix some fields in PSP level-2 directory Change-Id: Ib2da7f2210a823fce7f05824e2a2b73d3c0490e9 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13738 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:34:59 +01:00
* | 'PSP2' | Fletcher | Count |Look up mode|
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
* +------------+---------------+----------------+------------+
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
* | R e s e r v e d |
* +------------+---------------+----------------+------------+
amdfwtool: Fix some fields in PSP level-2 directory Change-Id: Ib2da7f2210a823fce7f05824e2a2b73d3c0490e9 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13738 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:34:59 +01:00
* | ID-Sel | PSP ID | PSPDIR ADDR | | 2nd PSP directory
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
* +------------+---------------+----------------+------------+
amdfwtool: Fix some fields in PSP level-2 directory Change-Id: Ib2da7f2210a823fce7f05824e2a2b73d3c0490e9 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13738 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:34:59 +01:00
* | ID-Sel | PSP ID | PSPDIR ADDR | | 3rd PSP directory
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
* +------------+---------------+----------------+------------+
* | |
* | Other PSP |
* | |
* +------------+---------------+----------------+------------+
*
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
*/
#include <fcntl.h>
#include <errno.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/types.h>
#include <unistd.h>
#include <string.h>
#include <stdlib.h>
#include <getopt.h>
#ifndef CONFIG_ROM_SIZE
#define CONFIG_ROM_SIZE 0x400000
#endif
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
#define AMD_ROMSIG_OFFSET 0x20000
#define MIN_ROM_KB 256
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
#define ALIGN(val, by) (((val) + (by) - 1) & ~((by) - 1))
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
/*
Reserved for future.
TODO: PSP2 is for Combo BIOS, which is the idea that one image supports 2
kinds of APU.
*/
#define PSP2 1
amdfwtool: Postpone the usage of PSP combo directory If we only need to "combo" two PSP directories into one image, we can put first address in romsig 0x10 and second one in romsig 0x14. If we really need to put three, the 0x14 is the combo directory which points to multiple level-2 PSP directories. I guess that two PSP can also use combo directory, with only one level-2 directory. But nobody seems to do that. Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13739 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-19 06:47:31 +01:00
#if PSP2
/* Use PSP combo directory or not.
* Currently we dont have to squeeze 3 PSP directories into 1 image. So
* we skip the combo directory.
*/
#define PSP_COMBO 0
#endif
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
typedef unsigned int uint32_t;
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
/*
* Creates the OSI Fletcher checksum. See 8473-1, Appendix C, section C.3.
* The checksum field of the passed PDU does not need to be reset to zero.
*
* The "Fletcher Checksum" was proposed in a paper by John G. Fletcher of
* Lawrence Livermore Labs. The Fletcher Checksum was proposed as an
* alternative to cyclical redundancy checks because it provides error-
* detection properties similar to cyclical redundancy checks but at the
* cost of a simple summation technique. Its characteristics were first
* published in IEEE Transactions on Communications in January 1982. One
* version has been adopted by ISO for use in the class-4 transport layer
* of the network protocol.
*
* This program expects:
* stdin: The input file to compute a checksum for. The input file
* not be longer than 256 bytes.
* stdout: Copied from the input file with the Fletcher's Checksum
* inserted 8 bytes after the beginning of the file.
* stderr: Used to print out error messages.
*/
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static uint32_t fletcher32(const uint16_t *pptr, int length)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
uint32_t c0;
uint32_t c1;
uint32_t checksum;
int index;
c0 = 0xFFFF;
c1 = 0xFFFF;
for (index = 0; index < length; index++) {
/*
* Ignore the contents of the checksum field.
*/
c0 += *(pptr++);
c1 += c0;
if ((index % 360) == 0) {
c0 = (c0 & 0xFFFF) + (c0 >> 16); // Sum0 modulo 65535 + the overflow
c1 = (c1 & 0xFFFF) + (c1 >> 16); // Sum1 modulo 65535 + the overflow
}
}
c0 = (c0 & 0xFFFF) + (c0 >> 16); // Sum0 modulo 65535 + the overflow
c1 = (c1 & 0xFFFF) + (c1 >> 16); // Sum1 modulo 65535 + the overflow
checksum = (c1 << 16) | c0;
return checksum;
}
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static void usage(void)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
printf("amdfwtool: Create AMD Firmware combination\n");
printf("Usage: amdfwtool [options] -f <size> -o <filename>\n");
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
printf("-x | --xhci <FILE> Add XHCI blob\n");
printf("-i | --imc <FILE> Add IMC blob\n");
printf("-g | --gec <FILE> Add GEC blob\n");
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
printf("\nPSP options:\n");
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
printf("-p | --pubkey <FILE> Add pubkey\n");
printf("-b | --bootloader <FILE> Add bootloader\n");
printf("-s | --smufirmware <FILE> Add smufirmware\n");
printf("-r | --recovery <FILE> Add recovery\n");
printf("-k | --rtmpubkey <FILE> Add rtmpubkey\n");
printf("-c | --secureos <FILE> Add secureos\n");
printf("-n | --nvram <FILE> Add nvram\n");
printf("-d | --securedebug <FILE> Add securedebug\n");
printf("-t | --trustlets <FILE> Add trustlets\n");
printf("-u | --trustletkey <FILE> Add trustletkey\n");
printf("-w | --smufirmware2 <FILE> Add smufirmware2\n");
printf("-m | --smuscs <FILE> Add smuscs\n");
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
#if PSP2
printf("\nPSP2 options:\n");
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
printf("-P | --pubkey2 <FILE> Add pubkey\n");
printf("-B | --bootloader2 <FILE> Add bootloader\n");
printf("-S | --smufirmware_2 <FILE> Add smufirmware\n");
printf("-L | --smufnfirmware_2 <FILE> Add fanless smufirmware\n");
printf("-R | --recovery2 <FILE> Add recovery\n");
printf("-K | --rtmpubkey2 <FILE> Add rtmpubkey\n");
printf("-C | --secureos2 <FILE> Add secureos\n");
printf("-N | --nvram2 <FILE> Add nvram\n");
printf("-D | --securedebug2 <FILE> Add securedebug\n");
printf("-T | --trustlets2 <FILE> Add trustlets\n");
printf("-U | --trustletkey2 <FILE> Add trustletkey\n");
printf("-W | --smufirmware2_2 <FILE> Add smufirmware2\n");
printf("-E | --smufnfirmware2_2 <FILE> Add fanless smufirmware2\n");
printf("-M | --smuscs2 <FILE> Add smuscs\n");
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
#endif
printf("\n-o | --output <filename> output filename\n");
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
printf("-f | --flashsize <HEX_VAL> ROM size in bytes\n");
printf(" size must be larger than %dKB\n",
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
MIN_ROM_KB);
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
printf(" and must a multiple of 1024\n");
printf("-h | --help show this help\n");
util/amdfwtool: add usage text Change-Id: I0ddb4516c03b0240d9134b35753ad901932d3f53 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17323 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:37:53 +01:00
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
}
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
#define FANLESS_FW 0x100 /* type[15:8]: 0=non-fanless OPNs, 1=fanless */
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
typedef enum _amd_fw_type {
AMD_FW_PSP_PUBKEY = 0,
AMD_FW_PSP_BOOTLOADER = 1,
AMD_FW_PSP_SMU_FIRMWARE = 8,
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
AMD_FW_PSP_SMU_FN_FIRMWARE = FANLESS_FW + AMD_FW_PSP_SMU_FIRMWARE,
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
AMD_FW_PSP_RECOVERY = 3,
AMD_FW_PSP_RTM_PUBKEY = 5,
AMD_FW_PSP_SECURED_OS = 2,
AMD_FW_PSP_NVRAM = 4,
AMD_FW_PSP_SECURED_DEBUG = 9,
AMD_FW_PSP_TRUSTLETS = 12,
AMD_FW_PSP_TRUSTLETKEY = 13,
AMD_FW_PSP_SMU_FIRMWARE2 = 18,
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
AMD_FW_PSP_SMU_FN_FIRMWARE2 = FANLESS_FW + AMD_FW_PSP_SMU_FIRMWARE2,
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
AMD_PSP_FUSE_CHAIN = 11,
AMD_FW_PSP_SMUSCS = 95,
AMD_FW_IMC,
AMD_FW_GEC,
AMD_FW_XHCI,
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
AMD_FW_INVALID,
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
} amd_fw_type;
typedef struct _amd_fw_entry {
amd_fw_type type;
char *filename;
} amd_fw_entry;
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static amd_fw_entry amd_psp_fw_table[] = {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{ .type = AMD_FW_PSP_PUBKEY },
{ .type = AMD_FW_PSP_BOOTLOADER },
{ .type = AMD_FW_PSP_SMU_FIRMWARE },
{ .type = AMD_FW_PSP_RECOVERY },
{ .type = AMD_FW_PSP_RTM_PUBKEY },
{ .type = AMD_FW_PSP_SECURED_OS },
{ .type = AMD_FW_PSP_NVRAM },
{ .type = AMD_FW_PSP_SECURED_DEBUG },
{ .type = AMD_FW_PSP_TRUSTLETS },
{ .type = AMD_FW_PSP_TRUSTLETKEY },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2 },
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE },
{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE2 },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{ .type = AMD_FW_PSP_SMUSCS },
{ .type = AMD_PSP_FUSE_CHAIN },
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
{ .type = AMD_FW_INVALID },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
};
#if PSP2
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static amd_fw_entry amd_psp2_fw_table[] = {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{ .type = AMD_FW_PSP_PUBKEY },
{ .type = AMD_FW_PSP_BOOTLOADER },
{ .type = AMD_FW_PSP_SMU_FIRMWARE },
{ .type = AMD_FW_PSP_RECOVERY },
{ .type = AMD_FW_PSP_RTM_PUBKEY },
{ .type = AMD_FW_PSP_SECURED_OS },
{ .type = AMD_FW_PSP_NVRAM },
{ .type = AMD_FW_PSP_SECURED_DEBUG },
{ .type = AMD_FW_PSP_TRUSTLETS },
{ .type = AMD_FW_PSP_TRUSTLETKEY },
{ .type = AMD_FW_PSP_SMU_FIRMWARE2 },
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE },
{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE2 },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{ .type = AMD_FW_PSP_SMUSCS },
{ .type = AMD_PSP_FUSE_CHAIN },
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
{ .type = AMD_FW_INVALID },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
};
#endif
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static amd_fw_entry amd_fw_table[] = {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{ .type = AMD_FW_XHCI },
{ .type = AMD_FW_IMC },
{ .type = AMD_FW_GEC },
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
{ .type = AMD_FW_INVALID },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
};
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static void fill_psp_head(uint32_t *pspdir, uint32_t count)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
pspdir[0] = 0x50535024; /* 'PSP$' */
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
pspdir[2] = count; /* size */
pspdir[3] = 0;
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
pspdir[1] = fletcher32((uint16_t *)&pspdir[1],
(count * 16 + 16) / 2 - 2);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
}
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
static uint32_t integrate_firmwares(char *base, uint32_t pos, uint32_t *romsig,
amd_fw_entry *fw_table, uint32_t rom_size)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
int fd;
struct stat fd_stat;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
int i;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
uint32_t rom_base_address = 0xFFFFFFFF - rom_size + 1;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
if (fw_table[i].filename != NULL) {
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
fd = open(fw_table[i].filename, O_RDONLY);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
fstat(fd, &fd_stat);
switch (fw_table[i].type) {
case AMD_FW_IMC:
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
pos = ALIGN(pos, 0x10000U);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
romsig[1] = pos + rom_base_address;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
break;
case AMD_FW_GEC:
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
romsig[2] = pos + rom_base_address;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
break;
case AMD_FW_XHCI:
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
romsig[3] = pos + rom_base_address;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
break;
default:
/* Error */
break;
}
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
if (pos + fd_stat.st_size > rom_size) {
printf("Error: Specified ROM size of %d"
" will not fit %s. Exiting.\n",
rom_size, fw_table[i].filename);
free(base);
exit(1);
}
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
read(fd, (void *)(base + pos), (size_t)fd_stat.st_size);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
pos += fd_stat.st_size;
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
close(fd);
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
pos = ALIGN(pos, 0x100U);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
}
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
}
return pos;
}
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
static uint32_t integrate_psp_firmwares(char *base, uint32_t pos,
uint32_t *pspdir,
amd_fw_entry *fw_table,
uint32_t rom_size)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
int fd;
struct stat fd_stat;
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
unsigned int i;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
uint32_t rom_base_address = 0xFFFFFFFF - rom_size + 1;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
if (fw_table[i].type == AMD_PSP_FUSE_CHAIN) {
pspdir[4+4*i+0] = fw_table[i].type;
pspdir[4+4*i+1] = 0xFFFFFFFF;
pspdir[4+4*i+2] = 1;
pspdir[4+4*i+3] = 0;
} else if (fw_table[i].filename != NULL) {
pspdir[4+4*i+0] = fw_table[i].type;
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
fd = open(fw_table[i].filename, O_RDONLY);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
fstat(fd, &fd_stat);
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
pspdir[4+4*i+1] = (uint32_t)fd_stat.st_size;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
pspdir[4+4*i+2] = pos + rom_base_address;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
pspdir[4+4*i+3] = 0;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
if (pos + fd_stat.st_size > rom_size) {
printf("Error: Specified ROM size of %d"
" will not fit %s. Exiting.\n",
rom_size, fw_table[i].filename);
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
free(base);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
exit(1);
}
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
read(fd, (void *)(base + pos), (size_t)fd_stat.st_size);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
pos += fd_stat.st_size;
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
close(fd);
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
pos = ALIGN(pos, 0x100U);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
} else {
/* This APU doesn't have this firmware. */
}
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
}
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
fill_psp_head(pspdir, i);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
return pos;
}
util/amdfwtool: Add PSP2 options to optstring Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit 482b65c219b932fd374f2ac469a023db219a66de) Change-Id: I0a24a0aa4c7d9f4a8cc3ee9b7da60ea7704e6f17 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17147 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Zheng Bao <fishbaozi@gmail.com>
2016-09-21 05:05:45 +02:00
#if PSP2
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
static const char *optstring =
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
"x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:P:B:S:L:R:K:C:N:D:T:U:W:E:M:o:f:h";
util/amdfwtool: Add PSP2 options to optstring Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit 482b65c219b932fd374f2ac469a023db219a66de) Change-Id: I0a24a0aa4c7d9f4a8cc3ee9b7da60ea7704e6f17 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17147 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Zheng Bao <fishbaozi@gmail.com>
2016-09-21 05:05:45 +02:00
#else
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
static const char *optstring = "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:o:f:h";
util/amdfwtool: Add PSP2 options to optstring Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit 482b65c219b932fd374f2ac469a023db219a66de) Change-Id: I0a24a0aa4c7d9f4a8cc3ee9b7da60ea7704e6f17 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17147 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Zheng Bao <fishbaozi@gmail.com>
2016-09-21 05:05:45 +02:00
#endif
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
static struct option long_options[] = {
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{"xhci", required_argument, 0, 'x' },
{"imc", required_argument, 0, 'i' },
{"gec", required_argument, 0, 'g' },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
/* PSP */
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{"pubkey", required_argument, 0, 'p' },
{"bootloader", required_argument, 0, 'b' },
{"smufirmware", required_argument, 0, 's' },
{"recovery", required_argument, 0, 'r' },
{"rtmpubkey", required_argument, 0, 'k' },
{"secureos", required_argument, 0, 'c' },
{"nvram", required_argument, 0, 'n' },
{"securedebug", required_argument, 0, 'd' },
{"trustlets", required_argument, 0, 't' },
{"trustletkey", required_argument, 0, 'u' },
{"smufirmware2", required_argument, 0, 'w' },
{"smuscs", required_argument, 0, 'm' },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
/* TODO: PSP2 */
#if PSP2
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{"pubkey2", required_argument, 0, 'P' },
{"bootloader2", required_argument, 0, 'B' },
{"smufirmware_2", required_argument, 0, 'S' },
{"smufnfirmware_2", required_argument, 0, 'L' },
{"recovery2", required_argument, 0, 'R' },
{"rtmpubkey2", required_argument, 0, 'K' },
{"secureos2", required_argument, 0, 'C' },
{"nvram2", required_argument, 0, 'N' },
{"securedebug2", required_argument, 0, 'D' },
{"trustlets2", required_argument, 0, 'T' },
{"trustletkey2", required_argument, 0, 'U' },
{"smufirmware2_2", required_argument, 0, 'W' },
{"smufnfirmware2_2", required_argument, 0, 'E' },
{"smuscs2", required_argument, 0, 'M' },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
#endif
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{"output", required_argument, 0, 'o' },
{"flashsize", required_argument, 0, 'f' },
{"help", no_argument, 0, 'h' },
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
{NULL, 0, 0, 0 }
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
};
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
static void register_fw_filename(amd_fw_type type, char filename[], int pspflag)
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
{
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
unsigned int i;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
for (i = 0; i < sizeof(amd_fw_table) / sizeof(amd_fw_entry); i++) {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
if (amd_fw_table[i].type == type) {
amd_fw_table[i].filename = filename;
return;
}
}
if (pspflag == 1) {
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
for (i = 0; i < sizeof(amd_psp_fw_table) /
sizeof(amd_fw_entry); i++) {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
if (amd_psp_fw_table[i].type == type) {
amd_psp_fw_table[i].filename = filename;
return;
}
}
}
#if PSP2
if (pspflag == 2) {
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
for (i = 0; i < sizeof(amd_psp2_fw_table) /
sizeof(amd_fw_entry); i++) {
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
if (amd_psp2_fw_table[i].type == type) {
amd_psp2_fw_table[i].filename = filename;
return;
}
}
}
#endif
}
int main(int argc, char **argv)
{
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
int c, pspflag = 0;
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
int retval = 0;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
#if PSP2
int psp2flag = 0;
amdfwtool: Correct the PSP2 directory layout PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-20 05:29:04 +01:00
uint32_t *psp2dir;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
char *tmp;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
#endif
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
#if PSP_COMBO
int psp2count;
#endif
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
char *rom = NULL;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
uint32_t current;
uint32_t *amd_romsig, *pspdir;
int targetfd;
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
char *output = NULL;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
uint32_t rom_size = CONFIG_ROM_SIZE;
uint32_t rom_base_address;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
while (1) {
int optindex = 0;
c = getopt_long(argc, argv, optstring, long_options, &optindex);
if (c == -1)
break;
switch (c) {
case 'x':
register_fw_filename(AMD_FW_XHCI, optarg, 0);
break;
case 'i':
register_fw_filename(AMD_FW_IMC, optarg, 0);
break;
case 'g':
register_fw_filename(AMD_FW_GEC, optarg, 0);
break;
case 'p':
register_fw_filename(AMD_FW_PSP_PUBKEY, optarg, 1);
pspflag = 1;
break;
case 'b':
register_fw_filename(AMD_FW_PSP_BOOTLOADER, optarg, 1);
pspflag = 1;
break;
case 's':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE,
optarg, 1);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
pspflag = 1;
break;
case 'r':
register_fw_filename(AMD_FW_PSP_RECOVERY, optarg, 1);
pspflag = 1;
break;
case 'k':
register_fw_filename(AMD_FW_PSP_RTM_PUBKEY, optarg, 1);
pspflag = 1;
break;
case 'c':
register_fw_filename(AMD_FW_PSP_SECURED_OS, optarg, 1);
pspflag = 1;
break;
case 'n':
register_fw_filename(AMD_FW_PSP_NVRAM, optarg, 1);
pspflag = 1;
break;
case 'd':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SECURED_DEBUG,
optarg, 1);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
pspflag = 1;
break;
case 't':
register_fw_filename(AMD_FW_PSP_TRUSTLETS, optarg, 1);
pspflag = 1;
break;
case 'u':
register_fw_filename(AMD_FW_PSP_TRUSTLETKEY, optarg, 1);
pspflag = 1;
break;
case 'w':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE2,
optarg, 1);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
pspflag = 1;
break;
case 'm':
register_fw_filename(AMD_FW_PSP_SMUSCS, optarg, 1);
pspflag = 1;
break;
#if PSP2
case 'P':
register_fw_filename(AMD_FW_PSP_PUBKEY, optarg, 2);
psp2flag = 1;
break;
case 'B':
register_fw_filename(AMD_FW_PSP_BOOTLOADER, optarg, 2);
psp2flag = 1;
break;
case 'S':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE,
optarg, 2);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
psp2flag = 1;
break;
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
case 'L':
register_fw_filename(AMD_FW_PSP_SMU_FN_FIRMWARE,
optarg, 2);
psp2flag = 1;
break;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
case 'R':
register_fw_filename(AMD_FW_PSP_RECOVERY, optarg, 2);
psp2flag = 1;
break;
case 'K':
register_fw_filename(AMD_FW_PSP_RTM_PUBKEY, optarg, 2);
psp2flag = 1;
break;
case 'C':
register_fw_filename(AMD_FW_PSP_SECURED_OS, optarg, 2);
psp2flag = 1;
break;
case 'N':
register_fw_filename(AMD_FW_PSP_NVRAM, optarg, 2);
psp2flag = 1;
break;
case 'D':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SECURED_DEBUG,
optarg, 2);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
psp2flag = 1;
break;
case 'T':
register_fw_filename(AMD_FW_PSP_TRUSTLETS, optarg, 2);
psp2flag = 1;
break;
case 'U':
register_fw_filename(AMD_FW_PSP_TRUSTLETKEY, optarg, 2);
psp2flag = 1;
break;
case 'W':
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE2,
optarg, 2);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
psp2flag = 1;
break;
util/amdfwtool: Add fanless SMU firmware options The Stoney Ridge program has OPNs that are considered fanless. These APUs are strapped to search for unique SMU firmware, indicated by Type[8]=1 in the directory table entry. Add new options to amdfwtool and include the blobs in the build with the appropriate bit set in the Type encoding. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da) Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18991 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-17 23:30:51 +01:00
case 'E':
register_fw_filename(AMD_FW_PSP_SMU_FN_FIRMWARE2,
optarg, 2);
psp2flag = 1;
break;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
case 'M':
register_fw_filename(AMD_FW_PSP_SMUSCS, optarg, 2);
psp2flag = 1;
break;
#endif
case 'o':
output = optarg;
break;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
case 'f':
rom_size = (uint32_t)strtoul(optarg, &tmp, 16);
if (*tmp != '\0') {
printf("Error: ROM size specified"
" incorrectly (%s)\n\n", optarg);
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
retval = 1;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
}
break;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
case 'h':
usage();
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
return 0;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
default:
break;
}
}
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
if (!output) {
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
printf("Error: Output value is not specified.\n\n");
retval = 1;
}
if (!rom_size) {
printf("Error: ROM Size is not specified.\n\n");
retval = 1;
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
}
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
if (rom_size % 1024 != 0) {
printf("Error: ROM Size (%d bytes) should be a multiple of"
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
" 1024 bytes.\n\n", rom_size);
retval = 1;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
}
if (rom_size < MIN_ROM_KB * 1024) {
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
printf("Error: ROM Size (%dKB) must be at least %dKB.\n\n",
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
rom_size / 1024, MIN_ROM_KB);
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
retval = 1;
}
if (retval) {
usage();
return retval;
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
}
printf(" AMDFWTOOL Using ROM size of %dKB\n", rom_size / 1024);
rom_base_address = 0xFFFFFFFF - rom_size + 1;
rom = malloc(rom_size);
if (!rom)
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
return 1;
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
memset(rom, 0xFF, rom_size);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
current = AMD_ROMSIG_OFFSET;
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
amd_romsig = (void *)(rom + AMD_ROMSIG_OFFSET);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
amd_romsig[0] = 0x55AA55AA; /* romsig */
amd_romsig[1] = 0;
amd_romsig[2] = 0;
amd_romsig[3] = 0;
current += 0x20; /* size of ROMSIG */
current = ALIGN(current, 0x1000U);
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
current = integrate_firmwares(rom, current, amd_romsig,
amd_fw_table, rom_size);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
if (pspflag == 1) {
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
current = ALIGN(current, 0x10000U);
pspdir = (void *)(rom + current);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
amd_romsig[4] = current + rom_base_address;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
current += 0x200; /* Conservative size of pspdir */
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
current = integrate_psp_firmwares(rom, current, pspdir,
amd_psp_fw_table, rom_size);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
}
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
#if PSP2
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
if (psp2flag == 1) {
util/amdfwtool: fix clang warnings Various fixes for clang warnings: warning: arithmetic on a pointer to void is a GNU extension - change *rom from void* to char* and cast back to void* as needed warning: implicit conversion changes signedness - In ALIGN macro, pass in value as unsigned warning: no previous prototype for function - Change functions to static warning: no previous extern declaration for non-static variable - Change global variables to static warning: comparison of integers of different signs - Make loop variable 'i' unsigned warning: variable 'output' may be uninitialized - Make sure an output filename was specified warning: implicit conversion loses integer precision - cast fd_stat.st_size to the appropriate type Change-Id: I0134a79c00938e121e63b52fd63bd502f4cb9e99 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17322 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 18:44:18 +01:00
current = ALIGN(current, 0x10000U); /* PSP2 dir */
psp2dir = (void *)(rom + current);
util/amdfwtool: Update with ROM size command line parameter Previously, the ROM size was passed into amdfwtool solely as a #define, meaning that all boards built with the tool would assume the same size ROM. This became a problem when the default rom for abuild was updated to be a board with a 256KB ROM. The temporary solution was to build amdfwtool individually for each board that needed it. This replaces that workaround by allowing the ROM size to be passed in as a command line parameter. - Add the -f | --flashsize option to accept a hex value for the ROM size. - Add checks to make sure the ROM size supplied is large enough. - Because the ROM size is not hardcoded, it needs to be passed to various functions. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I0ca69cbba54797e0387a6e85935767b4136ef615 Reviewed-on: https://review.coreboot.org/17321 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 17:55:01 +01:00
amd_romsig[5] = current + rom_base_address;
util/amdfwtool: Increase space used for structures Double the space for psp2dir to 0x200. Based on advice from AMD, increase the region containing the signature to 4K. Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit e03a9402711c3a210816d0aa32865491a0523639) Change-Id: If60132f913928bab0c2fe4aacedf342080929599 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17148 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Zheng Bao <fishbaozi@gmail.com>
2016-09-21 06:55:54 +02:00
current += 0x200; /* Add conservative size of psp2dir. */
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
#if PSP_COMBO
/* TODO: remove the hardcode. */
psp2count = 1; /* Start from 1. */
/* for (; psp2count <= PSP2COUNT; psp2count++, current=ALIGN(current, 0x100)) { */
/* Now the psp2dir is psp combo dir. */
psp2dir[psp2count*4 + 0 + 4] = 0; /* 0 -Compare PSP ID, 1 -Compare chip family ID */
psp2dir[psp2count*4 + 1 + 4] = 0x10220B00; /* TODO: PSP ID. Documentation is needed. */
util/amdfwtool: Fix whitespace Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:34:02 +01:00
psp2dir[psp2count*4 + 2 + 4] = current + rom_base_address;
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
pspdir = rom + current;
psp2dir[psp2count*4 + 3 + 4] = 0;
current += 0x200; /* Add conservative size of pspdir. Start of PSP entries. */
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
current = integrate_psp_firmwares(rom, current, pspdir,
amd_psp2_fw_table, rom_size);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
/* } */ /* End of loop */
/* fill the PSP combo head */
psp2dir[0] = 0x50535032; /* 'PSP2' */
psp2dir[2] = psp2count; /* Count */
psp2dir[3] = 1; /* 0-Dynamic look up through all entries, 1-PSP/chip ID match */
psp2dir[4] = 0; /* reserved 4 dwords. */
psp2dir[5] = 0;
psp2dir[6] = 0;
psp2dir[7] = 0;
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
psp2dir[1] = fletcher32((uint16_t *)&psp2dir[1],
(psp2count * 16 + 32) / 2 - 2);
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
#else
util/amdfwtool: Wrap long lines, excluding comments Change-Id: I35c4340cf14ca1609ce3bfcac78cc4e286eff34a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17326 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-08 19:46:31 +01:00
current = integrate_psp_firmwares(rom, current, psp2dir,
amd_psp2_fw_table, rom_size);
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
#endif
}
amdfwtool: Fix some PSP2 issues 1. Change the function which integrated one firmware, to the function which pushes the whole group. Use fw_table as a parameter instead of using the global table name. 2. Let PSP2 and PSP1 not dependent on the other. It turns out PSP2 can exist without PSP1. For some APU, the PSP directory has to be put in PSP2 field (ROMSIG 0x14). 3. Reserve 32 more bytes in PSP2 header. It is defined by spec. It is tested, and it is true. These above changes are overlapping, hard to split them. Sorry. Change-Id: I834630d9596d7fb941e2cad5d00ac3af04a537b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/13808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-02 07:47:27 +01:00
#endif
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666);
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
if (targetfd >= 0) {
write(targetfd, amd_romsig, current - AMD_ROMSIG_OFFSET);
close(targetfd);
} else {
printf("Error: could not open file: %s\n", output);
retval = 1;
}
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
util/amdfwtool: unify return values, verify the file open - Return an error if the specified file could not be opened. To do this cleanly, the return value was added. - Since there's now a unified return value, use it where it makes sense. - Don't return an error from --help. If you've asked for usage, it's not an error. Change-Id: I7c712d1e1927c2d4957b044b87ad26475b7a0e3b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17324 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-11-08 19:22:12 +01:00
free(rom);
return retval;
amdfwtool: Add amdfwtool to combine AMD firmwares Combine all needed AMD firmware into one single firmware, which going to be added as one single CBFS module. Change-Id: Ib044098c1837592b8f7e9c6a7da4ba3a32117e25 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/12419 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-17 15:57:39 +01:00
}