410 lines
9.5 KiB
C
410 lines
9.5 KiB
C
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/*
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* ATI Frame Buffer Device Driver Core Definitions
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*/
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#define u32 uint32_t
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#define u16 uint16_t
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#define u8 uint8_t
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#define u_int uint32_t
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#define EINVAL -1
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#define readb(addr) (*(volatile unsigned char *) (addr))
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#define readw(addr) (*(volatile unsigned short *) (addr))
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#define readl(addr) (*(volatile unsigned int *) (addr))
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#define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b))
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#define writew(b,addr) (*(volatile unsigned short *) (addr) = (b))
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#define writel(b,addr) (*(volatile unsigned int *) (addr) = (b))
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#define max(x,y) (x>=y)?x:y
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/*
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* Elements of the hardware specific atyfb_par structure
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*/
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#if 0
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struct crtc {
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u32 vxres;
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u32 vyres;
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u32 xoffset;
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u32 yoffset;
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u32 bpp;
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u32 h_tot_disp;
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u32 h_sync_strt_wid;
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u32 v_tot_disp;
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u32 v_sync_strt_wid;
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u32 off_pitch;
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u32 gen_cntl;
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u32 dp_pix_width; /* acceleration */
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u32 dp_chain_mask; /* acceleration */
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};
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struct pll_514 {
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u8 m;
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u8 n;
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};
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struct pll_18818
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{
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u32 program_bits;
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u32 locationAddr;
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u32 period_in_ps;
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u32 post_divider;
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};
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#endif
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struct pll_ct {
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u8 pll_ref_div;
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u8 pll_gen_cntl;
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u8 mclk_fb_div;
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u8 mclk_fb_mult; /* 2 or 4 */
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u8 sclk_fb_div;
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u8 pll_vclk_cntl;
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u8 vclk_post_div;
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u8 vclk_fb_div;
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u8 pll_ext_cntl;
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u8 spll_cntl2;
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u32 dsp_config; /* Mach64 GTB DSP */
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u32 dsp_on_off; /* Mach64 GTB DSP */
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u8 mclk_post_div_real;
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u8 xclk_post_div_real;
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u8 vclk_post_div_real;
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};
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union aty_pll {
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struct pll_ct ct;
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#if 0
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struct pll_514 ibm514;
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struct pll_18818 ics2595;
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#endif
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};
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/*
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* The hardware parameters for each card
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*/
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#if 0
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struct atyfb_par {
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struct crtc crtc;
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union aty_pll pll;
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u32 accel_flags;
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};
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struct aty_cursor {
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int enable;
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int on;
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int vbl_cnt;
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int blink_rate;
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u32 offset;
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struct {
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u16 x, y;
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} pos, hot, size;
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u32 color[2];
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u8 bits[8][64];
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u8 mask[8][64];
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u8 *ram;
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struct timer_list *timer;
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};
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#endif
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struct fb_info_aty {
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#if 0
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struct fb_info fb_info;
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struct fb_info_aty *next;
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unsigned long ati_regbase_phys;
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#endif
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unsigned long ati_regbase;
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#if 0
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unsigned long frame_buffer_phys;
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unsigned long frame_buffer;
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unsigned long clk_wr_offset;
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struct pci_mmap_map *mmap_map;
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struct aty_cursor *cursor;
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struct aty_cmap_regs *aty_cmap_regs;
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struct { u8 red, green, blue, pad; } palette[256];
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struct atyfb_par default_par;
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struct atyfb_par current_par;
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#endif
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u32 features;
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u32 total_vram;
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u32 ref_clk_per;
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u32 pll_per;
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u32 mclk_per;
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u32 xclk_per;
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u8 bus_type;
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u8 ram_type;
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#if 0
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u8 mem_refresh_rate;
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#endif
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#if 0
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struct aty_dac_ops *dac_ops;
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struct aty_pll_ops *pll_ops;
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#endif
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#if 0
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struct display disp;
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struct display_switch dispsw;
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#endif
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#if 0
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union {
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#ifdef FBCON_HAS_CFB16
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u16 cfb16[16];
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#endif
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#ifdef FBCON_HAS_CFB24
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u32 cfb24[16];
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#endif
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#ifdef FBCON_HAS_CFB32
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u32 cfb32[16];
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#endif
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} fbcon_cmap;
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u8 blitter_may_be_busy;
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#ifdef __sparc__
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u8 mmaped;
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int open;
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int vtconsole;
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int consolecnt;
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#endif
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#ifdef CONFIG_PMAC_PBOOK
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unsigned char *save_framebuffer;
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unsigned long save_pll[64];
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#endif
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#endif
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};
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/*
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* ATI Mach64 features
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*/
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#define M64_HAS(feature) ((info)->features & (M64F_##feature))
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#define M64F_RESET_3D 0x00000001
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#define M64F_MAGIC_FIFO 0x00000002
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#define M64F_GTB_DSP 0x00000004
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#define M64F_FIFO_24 0x00000008
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#define M64F_SDRAM_MAGIC_PLL 0x00000010
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#define M64F_MAGIC_POSTDIV 0x00000020
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#define M64F_INTEGRATED 0x00000040
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#define M64F_CT_BUS 0x00000080
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#define M64F_VT_BUS 0x00000100
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#define M64F_MOBIL_BUS 0x00000200
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#define M64F_GX 0x00000400
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#define M64F_CT 0x00000800
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#define M64F_VT 0x00001000
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#define M64F_GT 0x00002000
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#define M64F_MAGIC_VRAM_SIZE 0x00004000
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#define M64F_G3_PB_1_1 0x00008000
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#define M64F_G3_PB_1024x768 0x00010000
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#define M64F_EXTRA_BRIGHT 0x00020000
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#define M64F_LT_SLEEP 0x00040000
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#define M64F_XL_DLL 0x00080000
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#define M64F_MFB_TIMES_4 0x00100000
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/*
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* Register access
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*/
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static inline u32 aty_ld_le32(int regindex,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#ifdef CONFIG_ATARI
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return in_le32((volatile u32 *)(info->ati_regbase+regindex));
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#else
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return readl (info->ati_regbase + regindex);
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#endif
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}
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static inline void aty_st_le32(int regindex, u32 val,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#ifdef CONFIG_ATARI
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out_le32 (info->ati_regbase+regindex, val);
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#else
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writel (val, info->ati_regbase + regindex);
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#endif
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}
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static inline u16 aty_ld_le16(int regindex,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#if defined(__mc68000__)
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return le16_to_cpu(*((volatile u16 *)(info->ati_regbase+regindex)));
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#else
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return readw (info->ati_regbase + regindex);
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#endif
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}
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static inline void aty_st_le16(int regindex, u16 val,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#if defined(__mc68000__)
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*((volatile u16 *)(info->ati_regbase+regindex)) = cpu_to_le16(val);
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#else
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writew (val, info->ati_regbase + regindex);
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#endif
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}
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static inline u8 aty_ld_8(int regindex,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#ifdef CONFIG_ATARI
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return in_8 (info->ati_regbase + regindex);
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#else
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return readb (info->ati_regbase + regindex);
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#endif
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}
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static inline void aty_st_8(int regindex, u8 val,
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const struct fb_info_aty *info)
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{
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/* Hack for bloc 1, should be cleanly optimized by compiler */
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if (regindex >= 0x400)
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regindex -= 0x800;
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#ifdef CONFIG_ATARI
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out_8 (info->ati_regbase + regindex, val);
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#else
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writeb (val, info->ati_regbase + regindex);
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#endif
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}
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static inline u8 aty_ld_pll(int offset, const struct fb_info_aty *info)
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{
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u8 res;
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/* write addr byte */
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aty_st_8(CLOCK_CNTL + 1, (offset << 2), info);
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/* read the register value */
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res = aty_ld_8(CLOCK_CNTL + 2, info);
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return res;
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}
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/*
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* CT family only.
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*/
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static inline void aty_st_pll(int offset, u8 val,
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const struct fb_info_aty *info)
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{
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/* write addr byte */
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aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, info);
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/* write the register value */
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aty_st_8(CLOCK_CNTL + 2, val, info);
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aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, info);
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}
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/*
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* DAC operations
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*/
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#if 0
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struct aty_dac_ops {
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int (*set_dac)(const struct fb_info_aty *info, const union aty_pll *pll,
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u32 bpp, u32 accel);
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};
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extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
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extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
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extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
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extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
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static struct aty_dac_ops aty_dac_ct; /* Integrated */
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#endif
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/*
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* Clock operations
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*/
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#if 0
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struct aty_pll_ops {
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int (*var_to_pll)(const struct fb_info_aty *info, u32 vclk_per, u8 bpp,
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union aty_pll *pll);
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#if 0
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u32 (*pll_to_var)(const struct fb_info_aty *info,
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const union aty_pll *pll);
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void (*set_pll)(const struct fb_info_aty *info, const union aty_pll *pll);
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#endif
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};
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#endif
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#if 0
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extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
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extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
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extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
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extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
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extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
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extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
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static struct aty_pll_ops aty_pll_ct; /* Integrated */
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static void aty_set_pll_ct(const struct fb_info_aty *info,
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const union aty_pll *pll);
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static void aty_calc_pll_ct(const struct fb_info_aty *info,
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struct pll_ct *pll);
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#endif
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#if 0
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/*
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* Hardware cursor support
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*/
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extern struct aty_cursor *aty_init_cursor(struct fb_info_aty *fb);
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extern void atyfb_cursor(struct display *p, int mode, int x, int y);
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extern void aty_set_cursor_color(struct fb_info_aty *fb);
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extern void aty_set_cursor_shape(struct fb_info_aty *fb);
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extern int atyfb_set_font(struct display *d, int width, int height);
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/*
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* Hardware acceleration
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*/
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static inline void wait_for_fifo(u16 entries, const struct fb_info_aty *info)
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{
|
||
|
|
while ((aty_ld_le32(FIFO_STAT, info) & 0xffff) >
|
||
|
|
((u32)(0x8000 >> entries)));
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void wait_for_idle(struct fb_info_aty *info)
|
||
|
|
{
|
||
|
|
wait_for_fifo(16, info);
|
||
|
|
while ((aty_ld_le32(GUI_STAT, info) & 1)!= 0);
|
||
|
|
info->blitter_may_be_busy = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
extern void aty_reset_engine(const struct fb_info_aty *info);
|
||
|
|
extern void aty_init_engine(const struct atyfb_par *par,
|
||
|
|
struct fb_info_aty *info);
|
||
|
|
extern void aty_rectfill(int dstx, int dsty, u_int width, u_int height,
|
||
|
|
u_int color, struct fb_info_aty *info);
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Text console acceleration
|
||
|
|
*/
|
||
|
|
|
||
|
|
extern const struct display_switch fbcon_aty8;
|
||
|
|
extern const struct display_switch fbcon_aty16;
|
||
|
|
extern const struct display_switch fbcon_aty24;
|
||
|
|
extern const struct display_switch fbcon_aty32;
|
||
|
|
#endif
|