2010-04-08 13:37:43 +02:00
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%{
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/*
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* sconfig, coreboot device tree compiler
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*
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* Copyright (C) 2010 coresystems GmbH
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2016-05-07 10:11:14 +02:00
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* written by Patrick Georgi <patrick@georgi-clan.de>
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2010-04-08 13:37:43 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2010-05-05 13:19:50 +02:00
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#include "sconfig.h"
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2010-04-08 13:37:43 +02:00
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2016-05-07 10:11:14 +02:00
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int yylex();
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void yyerror(const char *s);
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2018-06-03 13:22:17 +02:00
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static struct bus *cur_parent;
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2018-05-31 19:33:16 +02:00
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static struct chip_instance *cur_chip_instance;
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2010-04-08 13:37:43 +02:00
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%}
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%union {
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2018-06-03 13:22:17 +02:00
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struct device *dev;
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2018-05-31 19:33:16 +02:00
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struct chip_instance *chip_instance;
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2010-04-08 13:37:43 +02:00
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char *string;
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int number;
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}
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2011-03-01 20:58:15 +01:00
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Add configurable ramstage support for minimal PCI scanning
This CL has changes that allow us to enable a configurable
ramstage, and one change that allows us to minimize PCI
scanning. Minimal scanning is a frequently requested feature.
To enable it, we add two new variables to src/Kconfig
CONFIGURABLE_RAMSTAGE
is the overall variable controlling other options for minimizing the
ramstage.
MINIMAL_PCI_SCANNING is how we indicate we wish to enable minimal
PCI scanning.
Some devices must be scanned in all cases, such as 0:0.0.
To indicate which devices we must scan, we add a new mandatory
keyword to sconfig
It is used in place of on, off, or hidden, and indicates
a device is enabled and mandatory. Mandatory
devices are always scanned. When MINIMAL_PCI_SCANNING is enabled,
ONLY mandatory devices are scanned.
We further add support in src/device/pci_device.c to manage
both MINIMAL_PCI_SCANNING and mandatory devices.
Finally, to show how this works in practice, we add mandatory
keywords to 3 devices on the qemu-q35.
TEST=
1. This is tested and working on the qemu-q35 target.
2. On CML-Hatch
Before CL:
Total Boot time: ~685ms
After CL:
Total Boot time: ~615ms
Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
2019-10-22 04:02:24 +02:00
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%token CHIP DEVICE REGISTER BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO
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2010-04-08 13:37:43 +02:00
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%%
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2018-06-03 13:22:17 +02:00
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devtree: { cur_parent = root_parent; } chip;
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2010-04-08 13:37:43 +02:00
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2010-05-05 15:13:47 +02:00
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chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ;
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2010-04-08 13:37:43 +02:00
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2020-04-28 16:28:03 +02:00
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devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | devicechildren smbios_slot_desc | devicechildren registers | /* empty */ ;
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2010-04-08 13:37:43 +02:00
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chip: CHIP STRING /* == path */ {
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2018-05-31 19:33:16 +02:00
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$<chip_instance>$ = new_chip_instance($<string>2);
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chip_enqueue_tail(cur_chip_instance);
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cur_chip_instance = $<chip_instance>$;
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2010-04-08 13:37:43 +02:00
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}
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2010-05-05 15:13:47 +02:00
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chipchildren END {
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2018-05-31 19:33:16 +02:00
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cur_chip_instance = chip_dequeue_tail();
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2010-04-08 13:37:43 +02:00
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};
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2018-09-10 04:51:26 +02:00
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device: DEVICE BUS NUMBER /* == devnum */ status {
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2018-06-03 13:22:17 +02:00
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$<dev>$ = new_device(cur_parent, cur_chip_instance, $<number>2, $<string>3, $<number>4);
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cur_parent = $<dev>$->last_bus;
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2010-04-08 13:37:43 +02:00
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}
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2010-05-05 15:13:47 +02:00
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devicechildren END {
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2018-06-03 13:22:17 +02:00
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cur_parent = $<dev>5->parent;
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2010-04-08 13:37:43 +02:00
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};
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Add configurable ramstage support for minimal PCI scanning
This CL has changes that allow us to enable a configurable
ramstage, and one change that allows us to minimize PCI
scanning. Minimal scanning is a frequently requested feature.
To enable it, we add two new variables to src/Kconfig
CONFIGURABLE_RAMSTAGE
is the overall variable controlling other options for minimizing the
ramstage.
MINIMAL_PCI_SCANNING is how we indicate we wish to enable minimal
PCI scanning.
Some devices must be scanned in all cases, such as 0:0.0.
To indicate which devices we must scan, we add a new mandatory
keyword to sconfig
It is used in place of on, off, or hidden, and indicates
a device is enabled and mandatory. Mandatory
devices are always scanned. When MINIMAL_PCI_SCANNING is enabled,
ONLY mandatory devices are scanned.
We further add support in src/device/pci_device.c to manage
both MINIMAL_PCI_SCANNING and mandatory devices.
Finally, to show how this works in practice, we add mandatory
keywords to 3 devices on the qemu-q35.
TEST=
1. This is tested and working on the qemu-q35 target.
2. On CML-Hatch
Before CL:
Total Boot time: ~685ms
After CL:
Total Boot time: ~615ms
Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
2019-10-22 04:02:24 +02:00
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status: BOOL | STATUS ;
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2018-09-10 04:51:26 +02:00
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2010-04-08 13:37:43 +02:00
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resource: RESOURCE NUMBER /* == resnum */ EQUALS NUMBER /* == resval */
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2010-05-05 14:05:25 +02:00
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{ add_resource(cur_parent, $<number>1, strtol($<string>2, NULL, 0), strtol($<string>4, NULL, 0)); } ;
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2010-04-08 13:37:43 +02:00
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registers: REGISTER STRING /* == regname */ EQUALS STRING /* == regval */
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2018-05-31 19:33:16 +02:00
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{ add_register(cur_chip_instance, $<string>2, $<string>4); } ;
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2010-04-08 13:37:43 +02:00
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2011-03-01 20:58:15 +01:00
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subsystemid: SUBSYSTEMID NUMBER NUMBER
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 0); };
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subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 1); };
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2012-06-21 22:19:48 +02:00
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ioapic_irq: IOAPIC_IRQ NUMBER PCIINT NUMBER
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{ add_ioapic_info(cur_parent, strtol($<string>2, NULL, 16), $<string>3, strtol($<string>4, NULL, 16)); };
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2019-04-12 14:42:17 +02:00
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smbios_slot_desc: SLOT_DESC STRING STRING STRING STRING
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{ add_slot_desc(cur_parent, $<string>2, $<string>3, $<string>4, $<string>5); };
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smbios_slot_desc: SLOT_DESC STRING STRING STRING
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{ add_slot_desc(cur_parent, $<string>2, $<string>3, $<string>4, NULL); };
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smbios_slot_desc: SLOT_DESC STRING STRING
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{ add_slot_desc(cur_parent, $<string>2, $<string>3, NULL, NULL); };
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2010-04-08 13:37:43 +02:00
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%%
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