2020-06-30 23:06:59 +02:00
|
|
|
# OCP Delta Lake
|
|
|
|
|
|
|
|
This page describes coreboot support status for the [OCP] (Open Compute Project)
|
2021-03-25 20:24:59 +01:00
|
|
|
Delta Lake server platform.
|
2020-06-30 23:06:59 +02:00
|
|
|
|
|
|
|
## Introduction
|
|
|
|
|
|
|
|
OCP Delta Lake server platform is a component of multi-host server system
|
2021-09-16 01:55:49 +02:00
|
|
|
Yosemite-V3. Both [Delta Lake server design spec] and [Yosemite-V3 design
|
2021-11-05 20:34:21 +01:00
|
|
|
spec] were [OCP] accepted.
|
|
|
|
|
|
|
|
On the other hand, Wiwynn's Yosemite-V3 system and Delta Lake server product
|
|
|
|
along with its OSF implementation, which is based on FSP/coreboot/LinuxBoot
|
|
|
|
stack, was [OCP] accepted; For details, check:
|
|
|
|
- [The OCP blog]
|
|
|
|
- [The Wiwynn Press Release]
|
|
|
|
- [The Wiwynn's Yosemite-V3 product in OCP market place]
|
|
|
|
Wiwynn and 9Elements formed a partnership to offer the Wiwynn's Yosemite-V3
|
|
|
|
product and OSF for it.
|
2020-06-30 23:06:59 +02:00
|
|
|
|
2020-12-02 23:12:50 +01:00
|
|
|
Delta Lake server is a single socket Cooper Lake Scalable Processor (CPX-SP) server.
|
2021-09-16 01:55:49 +02:00
|
|
|
Intel Cooper Lake Scalable Processor was launched in Q2 2020.
|
2020-06-30 23:06:59 +02:00
|
|
|
|
|
|
|
Yosemite-V3 has multiple configurations. Depending on configurations, it may
|
2021-03-25 20:24:59 +01:00
|
|
|
host up to 4 Delta Lake servers (blades) in one sled.
|
2020-06-30 23:06:59 +02:00
|
|
|
|
2021-11-05 20:34:21 +01:00
|
|
|
The Yosemite-V3 system is in mass production. Meta, Intel and partners
|
2021-03-25 20:24:59 +01:00
|
|
|
jointly develop Open System Firmware (OSF) solution on Delta Lake as an alternative
|
|
|
|
solution. The OSF solution is based on FSP/coreboot/LinuxBoot stack. The
|
2021-09-16 01:55:49 +02:00
|
|
|
OSF solution reached production quality for some use cases in July, 2021.
|
2020-06-30 23:06:59 +02:00
|
|
|
|
2021-09-16 01:55:49 +02:00
|
|
|
## How to build
|
2020-06-30 23:06:59 +02:00
|
|
|
|
2021-09-16 01:55:49 +02:00
|
|
|
OSF code base is public at
|
|
|
|
https://github.com/opencomputeproject/OpenSystemFirmware
|
|
|
|
|
|
|
|
Run following commands to build Delta Lake OSF image from scratch:
|
|
|
|
git clone https://github.com/opencomputeproject/OpenSystemFirmware.git
|
|
|
|
cd OpenSystemFirmware/Wiwynn/deltalake && ./download_and_build.sh
|
|
|
|
|
|
|
|
The Delta Lake OSF code base leverages [osf-builder] to sync down coreboot,
|
|
|
|
Linux kernel and u-root code from their upstream repo, and sync down needed
|
|
|
|
binary blobs. [osf-builder] also provides the top level build system.
|
|
|
|
|
|
|
|
Delta Lake server OSF solution requires following binary blobs:
|
2020-06-30 23:06:59 +02:00
|
|
|
- FSP blob: The blob (Intel Cooper Lake Scalable Processor Firmware Support Package)
|
2021-09-16 01:55:49 +02:00
|
|
|
can be downloaded from https://github.com/intel/FSP/tree/master/CedarIslandFspBinPkg.
|
2021-09-07 11:23:40 +02:00
|
|
|
- Microcode: Available through github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.
|
|
|
|
coreboot.org mirrors this repo and by default the correct binary is included.
|
2021-09-16 01:55:49 +02:00
|
|
|
- ME binary: Ignition binary can be downloaded from
|
|
|
|
https://github.com/tianocore/edk2-non-osi/tree/master/Silicon/Intel/PurleySiliconBinPkg/MeFirmware
|
2021-03-25 20:24:59 +01:00
|
|
|
- ACM binaries: only required for CBnT enablement. Available under NDA with Intel.
|
2021-09-16 01:55:49 +02:00
|
|
|
- Payload: LinuxBoot is necessary when LinuxBoot is used as the coreboot payload.
|
2020-06-30 23:06:59 +02:00
|
|
|
U-root as initramfs, is used in the joint development. It can be built
|
|
|
|
following [All about u-root].
|
|
|
|
|
|
|
|
## Flashing coreboot
|
|
|
|
|
|
|
|
To do in-band FW image update, use [flashrom]:
|
|
|
|
flashrom -p internal:ich_spi_mode=hwseq -c "Opaque flash chip" --ifd \
|
|
|
|
-i bios --noverify-all -w <path to coreboot image>
|
|
|
|
|
|
|
|
From OpenBMC, to update FW image:
|
|
|
|
fw-util slotx --update bios <path to coreboot image>
|
|
|
|
|
|
|
|
To power off/on the host:
|
|
|
|
power-util slotx off
|
|
|
|
power-util slotx on
|
|
|
|
|
|
|
|
To connect to console through SOL (Serial Over Lan):
|
|
|
|
sol-util slotx
|
|
|
|
|
2020-12-02 23:12:50 +01:00
|
|
|
## Firmware configurations
|
|
|
|
[ChromeOS VPD] is used to store most of the firmware configurations.
|
|
|
|
RO_VPD region holds default values, while RW_VPD region holds customized
|
|
|
|
values.
|
|
|
|
|
|
|
|
VPD variables supported are:
|
|
|
|
- firmware_version: This variable holds overall firmware version. coreboot
|
|
|
|
uses that value to populate smbios type 1 version field.
|
2021-02-08 03:08:18 +01:00
|
|
|
- bmc_bootorder_override: When it's set to 1 IPMI OEM command can override boot
|
|
|
|
order. The boot order override is done in the u-root LinuxBoot payload.
|
|
|
|
- systemboot_log_level: u-root package systemboot log levels, would be mapped to
|
2021-03-25 20:24:59 +01:00
|
|
|
quiet/verbose in systemboot as that is all we have for now. 5 to 8 would be
|
|
|
|
mapped to verbose, 0 to 4 and 9 would be mapped to quiet.
|
2021-08-30 10:29:11 +02:00
|
|
|
- VPDs affecting coreboot are listed/documented in [src/mainboard/ocp/deltalake/vpd.h].
|
2020-12-02 23:12:50 +01:00
|
|
|
|
2021-09-16 01:55:49 +02:00
|
|
|
## Features
|
2021-03-25 20:24:59 +01:00
|
|
|
The solution is developed using LinuxBoot payload with Linux kernel 5.2.9,
|
|
|
|
and [u-root] as initramfs.
|
2020-06-30 23:06:59 +02:00
|
|
|
- SMBIOS:
|
|
|
|
- Type 0 -- BIOS Information
|
|
|
|
- Type 1 -- System Information
|
|
|
|
- Type 2 -- Baseboard Information
|
|
|
|
- Type 3 -- System Enclosure or Chassis
|
|
|
|
- Type 4 -- Processor Information
|
2020-08-11 01:05:55 +02:00
|
|
|
- Type 7 -- Cache Information
|
2020-06-30 23:06:59 +02:00
|
|
|
- Type 8 -- Port Connector Information
|
|
|
|
- Type 9 -- PCI Slot Information
|
|
|
|
- Type 11 -- OEM String
|
2020-12-02 23:12:50 +01:00
|
|
|
- Type 16 -- Physical Memory Array
|
|
|
|
- Type 17 -- Memory Device
|
|
|
|
- Type 19 -- Memory Array Mapped Address
|
2020-08-11 01:05:55 +02:00
|
|
|
- Type 32 -- System Boot Information
|
|
|
|
- Type 38 -- IPMI Device Information
|
2020-12-02 23:12:50 +01:00
|
|
|
- Type 41 -- Onboard Devices Extended Information
|
2020-06-30 23:06:59 +02:00
|
|
|
- Type 127 -- End-of-Table
|
|
|
|
- BMC integration:
|
|
|
|
- BMC readiness check
|
|
|
|
- IPMI commands
|
|
|
|
- watchdog timer
|
|
|
|
- POST complete pin acknowledgement
|
2020-08-11 01:05:55 +02:00
|
|
|
- Check BMC version: ipmidump -device
|
2020-06-30 23:06:59 +02:00
|
|
|
- SEL record generation
|
2020-12-02 23:12:50 +01:00
|
|
|
- Converged Bootguard and TXT (CBnT)
|
|
|
|
- TPM
|
|
|
|
- Bootguard profile 0T
|
|
|
|
- TXT
|
2021-03-25 20:24:59 +01:00
|
|
|
- SRTM
|
|
|
|
- DRTM (verified through tboot)
|
|
|
|
- unsigned KM/BPM generation
|
|
|
|
- KM/BPM signing
|
|
|
|
- memory secret clearance upon ungraceful shutdown
|
2020-06-30 23:06:59 +02:00
|
|
|
- Early serial output
|
|
|
|
- port 80h direct to GPIO
|
2021-03-25 20:24:59 +01:00
|
|
|
- ACPI tables: APIC/DMAR/DSDT/EINJ/FACP/FACS/HEST/HPET/MCFG/SPMI/SRAT/SLIT/SSDT
|
2020-06-30 23:06:59 +02:00
|
|
|
- Skipping memory training upon subsequent reboots by using MRC cache
|
|
|
|
- BMC crash dump
|
|
|
|
- Error injection through ITP
|
2020-08-11 01:05:55 +02:00
|
|
|
- Versions
|
|
|
|
- Check FSP version: cbmem | grep LB_TAG_PLATFORM_BLOB_VERSION
|
|
|
|
- Check Microcode version: cat /proc/cpuinfo | grep microcode
|
|
|
|
- Devices:
|
|
|
|
- Boot drive
|
|
|
|
- All 5 data drives
|
2021-03-25 20:24:59 +01:00
|
|
|
- NIC card
|
2020-08-11 01:05:55 +02:00
|
|
|
- Power button
|
|
|
|
- localboot
|
|
|
|
- netboot from IPv6
|
2021-08-23 14:21:06 +02:00
|
|
|
- RAS (SMI handlers not upstreamed)
|
|
|
|
- EINJ/HEST
|
|
|
|
- error injection through ITP
|
|
|
|
- memory error handling
|
|
|
|
- PCIe error handling
|
|
|
|
- PCIe live error recovery (LER)
|
2020-08-11 01:05:55 +02:00
|
|
|
|
|
|
|
## Stress/performance tests passed
|
2020-12-02 23:12:50 +01:00
|
|
|
- OS warm reboot (1000 cycles)
|
|
|
|
- DC reboot (1000 cycles)
|
|
|
|
- AC reboot (1000 cycle)
|
2020-08-11 01:05:55 +02:00
|
|
|
- Mprime test (6 hours)
|
2020-09-24 21:17:20 +02:00
|
|
|
- StressAppTest (6 hours)
|
|
|
|
- Ptugen (6 hours)
|
2020-12-02 23:12:50 +01:00
|
|
|
|
2021-03-25 20:24:59 +01:00
|
|
|
## Performance on par with traditional firmware
|
2020-12-02 23:12:50 +01:00
|
|
|
- coremark
|
2020-09-24 21:17:20 +02:00
|
|
|
- FIO
|
2021-03-25 20:24:59 +01:00
|
|
|
- Iperf(IPv6)
|
|
|
|
- Linpack
|
|
|
|
- Intel MLC (memory latency and bandwidth)
|
|
|
|
- SpecCPU
|
|
|
|
- stream
|
2020-06-30 23:06:59 +02:00
|
|
|
|
2020-12-02 23:12:50 +01:00
|
|
|
## Other tests passed
|
|
|
|
- Power
|
|
|
|
- Thermal
|
2021-03-25 20:24:59 +01:00
|
|
|
- coreboot address sanitizer (both romstage and ramstage)
|
|
|
|
- Intel selftest tool (all errors analyzed; applicable errors clean)
|
2020-06-30 23:06:59 +02:00
|
|
|
|
|
|
|
## Known issues
|
2020-12-02 23:12:50 +01:00
|
|
|
- HECI access at OS run time:
|
|
|
|
- spsInfoLinux64 command fail to return ME version
|
|
|
|
- ptugen command fail to get memory power
|
2021-03-25 20:24:59 +01:00
|
|
|
- CLTT (Closed Loop Thermal Throttling, eg. thermal protection for DIMMs)
|
|
|
|
- ProcHot (thermal protection for processors)
|
2020-06-30 23:06:59 +02:00
|
|
|
|
|
|
|
## Feature gaps
|
2020-12-02 23:12:50 +01:00
|
|
|
- flashrom command not able to update ME region
|
2021-03-25 20:24:59 +01:00
|
|
|
- ACPI BERT table
|
|
|
|
- PCIe hotplug through VPP (Virtual Pin Ports)
|
2020-12-02 23:12:50 +01:00
|
|
|
- RO_VPD region as well as other RO regions are not write protected
|
|
|
|
- Not able to selectively enable/disable core
|
2020-06-30 23:06:59 +02:00
|
|
|
|
|
|
|
## Technology
|
|
|
|
|
|
|
|
```eval_rst
|
|
|
|
+------------------------+---------------------------------------------+
|
|
|
|
| Processor (1 socket) | Intel Cooper Lake Scalable Processor |
|
|
|
|
+------------------------+---------------------------------------------+
|
|
|
|
| BMC | Aspeed AST 2500 |
|
|
|
|
+------------------------+---------------------------------------------+
|
2020-08-11 01:05:55 +02:00
|
|
|
| PCH | Intel Lewisburg C620 Series |
|
2020-06-30 23:06:59 +02:00
|
|
|
+------------------------+---------------------------------------------+
|
|
|
|
```
|
|
|
|
|
|
|
|
[OCP]: https://www.opencompute.org
|
2021-09-16 01:55:49 +02:00
|
|
|
[Delta Lake server design spec]: https://www.opencompute.org/documents/delta-lake-1s-server-design-specification-1v05-pdf
|
|
|
|
[Yosemite-V3 design spec]: https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf
|
2021-11-05 20:34:21 +01:00
|
|
|
[The OCP blog]: https://www.opencompute.org/blog/open-system-firmware-for-ocp-server-deltalake-is-published
|
|
|
|
[The Wiwynn Press Release]: https://www.prnewswire.com/news-releases/wiwynn-successfully-implemented-open-system-firmware-on-its-ocp-yosemite-v3-server-301417374.html?tc=eml_cleartime
|
|
|
|
[The Wiwynn's Yosemite-V3 product in OCP market place]: https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server
|
2021-09-16 01:55:49 +02:00
|
|
|
[osf-builder]: https://github.com/facebookincubator/osf-builder
|
2020-06-30 23:06:59 +02:00
|
|
|
[OCP virtual summit 2020]: https://www.opencompute.org/summit/virtual-summit/schedule
|
|
|
|
[flashrom]: https://flashrom.org/Flashrom
|
|
|
|
[All about u-root]: https://github.com/linuxboot/book/tree/master/u-root
|
|
|
|
[u-root]: https://u-root.org/
|
|
|
|
[ChromeOS VPD]: https://chromium.googlesource.com/chromiumos/platform/vpd/+/master/README.md
|
2021-08-30 10:29:11 +02:00
|
|
|
[src/mainboard/ocp/deltalake/vpd.h]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src/mainboard/ocp/deltalake/vpd.h
|