2010-04-08 14:47:35 +02:00
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chip mainboard/emulation/qemu-x86
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2009-08-12 17:00:51 +02:00
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device pci_domain 0 on
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device pci 0.0 on end
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chip southbridge/intel/i82371eb # southbridge
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device pci 01.0 on end
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device pci 01.1 on end
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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end
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# register "com1" = "{1}"
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# register "com1" = "{1, 0, 0x3f8, 4}"
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end
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end
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