2019-01-16 22:40:01 +01:00
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# Project Ideas
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This section collects ideas to improve coreboot and related projects and
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should serve as a pool of ideas for people who want to enter the field
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of firmware development but need some guidance what to work on.
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These tasks can be adopted as part of programs like Google Summer of
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Code or by motivated individuals outside such programs.
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Each entry should outline what would be done, the benefit it brings
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to the project, the pre-requisites, both in knowledge and parts. They
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should also list people interested in supporting people who want to work
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on them - since we started building this list for Google Summer of Code,
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we'll adopt its term for those people and call them mentors.
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## Provide toolchain binaries
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Our crossgcc subproject provides a uniform compiler environment for
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working on coreboot and related projects. Sadly, building it takes hours,
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which is a bad experience when trying to build coreboot the first time.
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Provide packages/installers of our compiler toolchain for Linux distros,
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Windows, Mac OS. For Windows, this should also include the environment
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(shell, make, ...).
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### Requirements
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* coreboot knowledge: Should know how to build coreboot images and where
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the compiler comes into play in our build system.
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* other knowledge: Should know how packages or installers for their
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target OS work. Knowledge of the GCC build system is a big plus
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* hardware requirements: Nothing special
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### Mentors
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* Patrick Georgi <patrick@georgi.software>
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## Support Power9/Power8 in coreboot
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There are some basic PPC64 stubs in coreboot, and there's open hardware
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in TALOS2 and its family. While they already have fully open source
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firmware, coreboot support adds a unified story for minimal firmware
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across architectures.
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### Requirements
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* coreboot knowledge: Should be familiar with making chipset level
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changes to the code.
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* other knowledge: A general idea of the Power architecture, the more,
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the better
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* hardware requirements: QEMU Power bring-up exists, and even if it
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probably needs to be fixed up, that shouldn't be an exceedingly large
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task. For everything else, access to real Power8/9 hardware and recovery
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tools (e.g. for external flashing) is required.
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### Mentors
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* Timothy Pearson <tpearson@raptorengineering.com>
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## Support QEMU AArch64 or MIPS
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Having QEMU support for the architectures coreboot can boot helps with
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some (limited) compatibility testing: While QEMU generally doesn't need
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much hardware init, any CPU state changes in the boot flow will likely
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be quite close to reality.
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That could be used as a baseline to ensure that changes to architecture
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code doesn't entirely break these architectures
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### Requirements
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* coreboot knowledge: Should know the general boot flow in coreboot.
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* other knowledge: This will require knowing how the architecture
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typically boots, to adapt the coreboot payload interface to be
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appropriate and, for example, provide a device tree in the platform's
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typical format.
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* hardware requirements: since QEMU runs practically everywhere and
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needs no recovery mechanism, these are suitable projects when no special
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hardware is available.
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### Mentors
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2019-02-14 13:15:38 +01:00
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## Add Kernel Address Sanitizer functionality to coreboot
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The Kernel Address Sanitizer (KASAN) is a runtime dynamic memory error detector.
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The idea is to check every memory access (variables) for its validity
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during runtime and find bugs like stack overflow or out-of-bounds accesses.
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Implementing this stub into coreboot like "Undefined behavior sanitizer support"
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would help to ensure code quality and make the runtime code more robust.
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### Requirements
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* knowledge in the coreboot build system and the concept of stages
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* the KASAN feature can be improved in a way so that the memory space needed
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during runtime is not on a fixed address provided during compile time but
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determined during runtime. For this to achieve a small patch to the GCC will
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be helpful. Therefore minor GCC knowledge would be beneficial.
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* Implementation can be initially done in QEMU and improved on different
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mainboards and platforms
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### Mentors
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* Werner Zeh <werner.zeh@gmx.net>
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