coreboot-kgpe-d16/src/mainboard/pcengines/apu2/board_info.txt

Board name: PC Engines APU2
Board URL: http://www.pcengines.ch/apu2c2.htm
Category: half
ROM protocol: SPI
ROM socketed: n
Flashrom support: y
pcengines/apu2: add board support Initial work based on db-ft3b-ls and code released by Eltan. Board boots with some limitation. Now the AGESA binary is harcoded and board specific until it's fixed by the SoC vendor. memtest86+ from external repo skips looking for SPD on SMBus, which when performed cause memtest86+ to hang. Still didn't tried whole test suit. SeaBIOS 1.9.3 have some problems with USB which lead to no booting in some cases. Full log: https://gist.github.com/pietrushnic/787cbf63f610ff4f6b4ac13e5c20b872 SeaBIOS from PC Engines repository (https://github.com/pcengines/seabios) works fine. Those changes are planned for upstream. Information about obtaining and booting Voyage Linux: https://github.com/pcengines/apu2-documentation#building-firmware-using-apu2-image-builder Change-Id: Id23e448e27f4bba47b7e9e7fa7679e2690c6e4bc Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/14138 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> 2016-05-27 12:04:13 +02:00			`Board name: PC Engines APU2`
			`Board URL: http://www.pcengines.ch/apu2c2.htm`
			`Category: half`
			`ROM protocol: SPI`
			`ROM socketed: n`
			`Flashrom support: y`