2006-10-14 23:35:30 +02:00
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;*****************************************************
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; $Id: loader.s,v 1.1 2002/11/25 02:07:53 rminnich Exp $
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;*****************************************************
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USE32
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; code it is loaded into memory at 0x7C00
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;*****************************************************
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nop
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nop
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;*****************************************************
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; A) setup GDT, so that we do not depend on program
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; that loaded us for GDT.
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2008-01-18 16:08:58 +01:00
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; Ex: coreboot and EtherBOOT use different GDT's.
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2006-10-14 23:35:30 +02:00
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;-----------------------------------------------------
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; 0)
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cli
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;-----------------------------------------------------
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; I)
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lgdt [0x7C00+protected_gdt]
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;-----------------------------------------------------
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; II) setup CS
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jmp 0x08:0x7C00+newpgdt
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newpgdt: nop
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;-----------------------------------------------------
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; III) setup all other segments
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mov ax, #0x10
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mov ss, ax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;-----------------------------------------------------
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; IV)
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; not now
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;sti
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;*****************************************************
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nop
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nop
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;*****************************************************
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; B) shadow - ON (enable/read/write)
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mov eax, #0x80000070
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mov dx, #0x0cf8
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out dx, eax
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mov eax, #0xFFFFFFFF
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mov dx, #0x0cfc
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out dx, eax
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;*****************************************************
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nop
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nop
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;*****************************************************
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; C) copy -- boch bios
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; counter - 64kb.
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mov ecx, #0x10000
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; source - 0x8000 ( 0x7C00+0x400 = 0x8000 )
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mov ax, #0x10 ; src-segment - 2nd entry in GDT
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mov ds, ax
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mov eax, #0x8000 ; src-offset - 0x8000
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mov esi, eax
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; destination - 0xE0000
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mov ax, #0x10 ; dst-segment - 2nd entry in GDT
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mov es, ax
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mov eax, #0xF0000 ; dst-offset - 0xF0000
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mov edi, eax
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; clear direction flag
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cld
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; the copy
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rep
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movsb
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;*****************************************************
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nop
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nop
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;*****************************************************
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2008-01-18 16:08:58 +01:00
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; X) copy -- coreboot table into safe place.
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2006-10-14 23:35:30 +02:00
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;; TODO.
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;; Q1 : what is the size of table.
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;; Q2 : where to copy?
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;*****************************************************
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nop
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nop
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;*****************************************************
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; E) shadow - OFF (write)
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mov eax, #0x80000070
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mov dx, #0x0cf8
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out dx, eax
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;mov eax, #0xFFFFFFFF
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mov eax, #0x0000FFFF
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mov dx, #0x0cfc
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out dx, eax
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;*****************************************************
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nop
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nop
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;*****************************************************
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; F) do a little prep work.
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;-----------------------------------------------------
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; I) disable cache
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; if you disable cache, GRUB's GFX mode will be VERY slow.
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; so DO NOT DISABLE
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;mov eax, cr0
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;or eax, #0x60000000
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;wbinvd
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;mov cr0, eax
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;wbinvd
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;-----------------------------------------------------
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; II) disable MTRR
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; clear the "E" (0x800) and "FE" (0x400) flags in
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; IA32_MTRRdefType register (0x2FF)
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;-----------------------
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;mov ECX,#0x2FF
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; select either of the two below
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; depending on if your compiler suports
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; {RD,WR}MSR or not
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;rdmsr
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; .byte 0x0F, 0x32
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;xor edx, edx
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; xor eax, eax
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;and eax, #0xFFFFF3FF
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; select either of the two below
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; depending on if your compiler suports
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; {RD,WR}MSR or not
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;wrmsr
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; .byte 0x0F, 0x30
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;-----------------------
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;; This is what PC BIOS is setting. -- P6STMT.
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; add VIDEO BIOS cacheable!!!!
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;-----------------------
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; Fixed Range C0--C8
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;mov ECX,#0x268
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;mov EDX,#0x05050505
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;mov EAX,#0x05050505
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;wrmsr
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;-----------------------
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; Fixed Range C8--CF
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;mov ECX,#0x269
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;mov EDX,#0x0
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;mov EAX,#0x05050505
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;wrmsr
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;-----------------------
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;-----------------------------------------------------
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; III) tell BOCHS' BIOS we want to boot from hdd.
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; 0x00 - floppy
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; 0x02 - hdd
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; In future there will be 'fd failover'option in bochs.
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mov al, #0x3d ;; cmos_reg
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out 0x70, al
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mov al, #0x02 ;; val (hdd)
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out 0x71, al
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;-----------------------------------------------------
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; IV) tell BOCHS' BIOS length of our mem block @ 1mb.
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; This is for Int 15 / EAX=E820
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; 119mb = 0x77 00 00 00
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; (this is for 128mb of ram)
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; (FIXME: this value is currently hard coded)
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2008-01-18 16:08:58 +01:00
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; (it should be being passed from coreboot )
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2006-10-14 23:35:30 +02:00
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; for WinFast 6300
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; 07 70 = 0770
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; 06 80 = 0770 - 00F0 << ALT (for unpatched bochs)
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; for P6STMT - 10kb less ram
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; 077F - 10 = 07 6F
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; 07 6F - 00 F0 = 06 7F
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mov al, #0x35 ;; cmos_reg
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out 0x70, al
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mov al, #0x06 ;; val
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out 0x71, al
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mov al, #0x34 ;; cmos_reg
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out 0x70, al
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mov al, #0x7F ;; val
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out 0x71, al
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mov al, #0x31 ;; cmos_reg
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out 0x70, al
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mov al, #0x00 ;; val
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out 0x71, al
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mov al, #0x30 ;; cmos_reg
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out 0x70, al
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mov al, #0x00 ;; val
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out 0x71, al
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;-----------------------------------------------------
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; V) tell BOCHS' BIOS we want to have LBA translation.
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; 0x00 - NONE
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; 0x01 - LBA <<<<
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; 0x02 - LARGE
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; 0x03 - R-CHS
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; In future there will be 'fd failover'option in bochs.
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mov al, #0x39 ;; cmos_reg
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out 0x70, al
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mov al, #0x01 ;; val (LBA)
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out 0x71, al
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;*****************************************************
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nop
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nop
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;*****************************************************
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; G) the switch -- protected to real mode
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; IASDM, Vol 3
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; (8-14) 8.8.2 Switching Back to Real-Address Mode
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;=====================================================
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; 1) disable interrupts
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cli
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;=====================================================
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nop
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;=====================================================
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; 2) paging
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;not enabled, so not applicable.
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;=====================================================
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; 3) setup CS segment limit (64kb)
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; I)
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lgdt [0x7C00+new_gdt]
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;-----------------------------------------------------
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; II)
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jmp 0x08:0x7C00+new64lim
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new64lim: nop
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;=====================================================
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nop
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;=====================================================
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; 4) setup all other segments
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mov ax, #0x10
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mov ss, ax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;=====================================================
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nop
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;=====================================================
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; 5) LIDT
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; I)
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; set up Real Mode IDT table (0...3FF)
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; for BOCH's BIOS the address 0xF000:0xFF53
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; cantains value 0xCF which is IRET opcode.
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; counter
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mov cx, #0xFF ;1024 bytes(255 interrupts)(4*255=0x3FF)
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; destination - 0x00000 = ES:EDI
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mov ax, #0x10 ; dst-segment - 2nd entry in GDT
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mov es, ax
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mov eax, #0x00000 ; dst-offset - 0x00000
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mov edi, eax
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; data to store -- 0xF000:FF53
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mov eax, #0xF000FF53
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; clear direction flag
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cld
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; the store
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rep
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stosd
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;-----------------------------------------------------
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; II)
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; load interrupt descriptor table
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lidt [0x7C00+new_idt]
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;=====================================================
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nop
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nop
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;=====================================================
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; 6) clear the PE flag in CR0 register.
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; I)
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; switch to 16 bit segments
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mov ax, #0x20
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mov ss, ax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;-----------------------------------------------------
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; II)
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; switch to 16 bit CS
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jmp 0x018:0x7C00+new16bit
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USE16
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new16bit: nop
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;-----------------------------------------------------
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; III)
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; the switch
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;xor eax, eax
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mov eax, cr0
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and eax, #0xFFFFFFFE
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mov cr0, eax ;switch to RM
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;=====================================================
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nop
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nop
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;=====================================================
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; 7) far jump -- (to real mode address)
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jmp 0x0:0x7C00+realcs
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realcs: nop
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;=====================================================
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; 8) set all segment registers to 0's
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mov ax, #0x0
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mov ss, ax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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;=====================================================
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; 9) re-enable interrupts
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sti
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;*****************************************************
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nop
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nop
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;*****************************************************
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; G) jump to BIOS.
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jmp 0xFFFF:0x0000
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;jmp 0xF000:0xFFF0
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;*****************************************************
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;*****************************************************
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nop
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nop
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nop
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nop
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;*****************************************************
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;*****************************************************
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USE32
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new_idt:
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dw 0x03ff ;; limit 15:00
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dw 0x0000 ;; base 15:00
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dw 0x0000 ;; base 23:16
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new_gdt:
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dw 0x0028 ;; limit 15:00
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dw 0x7C00+new_gdt_table ;; base 15:00
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dw 0x0000 ;; base 23:16
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protected_gdt:
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dw 0x0018 ;; limit 15:00
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dw 0x7C00+pmode_gdt_table ;; base 15:00
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dw 0x0000 ;; base 23:16
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;-----------------------------------------------------
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new_gdt_table:
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;// 1 2 3 4
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;//0
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dd 0x00000000
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dd 0x00000000
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;//8
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dd 0x0000ffff
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dd 0x00409E00
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;//10
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dd 0x0000ffff
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dd 0x00409200
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;//18
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dd 0x0000ffff
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dd 0x00009a00
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;//20
|
|
|
|
dd 0x0000ffff
|
|
|
|
dd 0x00009200
|
|
|
|
|
|
|
|
;-------------------------
|
|
|
|
|
|
|
|
pmode_gdt_table:
|
|
|
|
;// 1 2 3 4
|
|
|
|
;//0
|
|
|
|
dd 0x00000000
|
|
|
|
dd 0x00000000
|
|
|
|
|
|
|
|
;//8
|
|
|
|
dd 0x0000ffff
|
|
|
|
dd 0x00CF9E00
|
|
|
|
|
|
|
|
;//10
|
|
|
|
dd 0x0000ffff
|
|
|
|
dd 0x00CF9200
|
|
|
|
|
|
|
|
;*****************************************************
|
|
|
|
;*****************************************************
|
|
|
|
; the file size must be 1024 bytes.
|
|
|
|
|
|
|
|
|
|
|
|
.org 0x400-1
|
|
|
|
; dd 0xdeadbeef
|
|
|
|
db 0x0
|
|
|
|
|
|
|
|
;*****************************************************
|