coreboot-kgpe-d16/targets/intel/truxton/Config.lb

##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Arastra, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License version 2 as
## published by the Free Software Foundation.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
##

target truxton
mainboard intel/truxton

## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use
## (normal AND fallback images and payloads).
option CONFIG_ROM_SIZE = 2 * 1024 * 1024

## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
## not including any payload.
option CONFIG_ROM_IMAGE_SIZE = 128 * 1024

## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image
## (including payload) will use
option CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE

romimage "fallback"
	option CONFIG_USE_FALLBACK_IMAGE=1
	payload /tmp/seabios.elf
end

buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"