60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <string.h>
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#include <soc/pei_data.h>
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#include <soc/pei_wrapper.h>
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#include "boardid.h"
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/* PCH_MEM_CFG[3:0] */
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#define MAX_MEMORY_CONFIG 0x10
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#define RCOMP_TARGET_PARAMS 0x5
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void mainboard_fill_pei_data(struct pei_data *pei_data)
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{
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/* DQ byte map */
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const u8 dq_map[2][12] = {
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{ 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0 ,
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0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
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{ 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0 ,
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0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
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/* DQS CPU<>DRAM map */
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const u8 dqs_map[2][8] = {
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{ 0, 1, 3, 2, 6, 5, 4, 7 },
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{ 2, 3, 0, 1, 6, 7, 4, 5 } };
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/* Rcomp resistor */
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const u16 RcompResistor[3] = { 200, 81, 162 };
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/* Rcomp target */
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static const u16 RcompTarget[MAX_MEMORY_CONFIG][RCOMP_TARGET_PARAMS] = {
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{ 100, 40, 40, 23, 40 },
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{ 100, 40, 40, 23, 40 },
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{ 100, 40, 40, 23, 40 },
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/*Strengthen the Rcomp Target Ctrl for 8GB K4E6E304EE -EGCF*/
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{ 100, 40, 40, 21, 40 }, };
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memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
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memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map));
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memcpy(pei_data->RcompResistor, RcompResistor,
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sizeof(RcompResistor));
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memcpy(pei_data->RcompTarget, &RcompTarget[pei_data->mem_cfg_id][0],
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sizeof(RcompTarget[pei_data->mem_cfg_id]));
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}
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