32 lines
846 B
C
32 lines
846 B
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <intelblocks/gspi.h>
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#include <soc/pci_devs.h>
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int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
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{
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switch (gspi_bus) {
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case 0:
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return PCH_DEVFN_GSPI0;
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case 1:
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return PCH_DEVFN_GSPI1;
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case 2:
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return PCH_DEVFN_GSPI2;
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}
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return -1;
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}
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