2008-09-02 18:06:22 +02:00
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/*
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* This file is part of the libpayload project.
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*
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2010-03-25 23:17:36 +01:00
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* Copyright (C) 2008-2010 coresystems GmbH
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2008-09-02 18:06:22 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2008-11-24 18:54:46 +01:00
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#include <libpayload-config.h>
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2008-09-11 19:29:00 +02:00
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#include <usb/usb.h>
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2008-09-02 18:06:22 +02:00
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#include "uhci.h"
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2010-08-13 11:18:58 +02:00
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#include "ohci.h"
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2010-09-25 19:01:13 +02:00
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#include "ehci.h"
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2010-08-13 11:18:58 +02:00
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#include "xhci.h"
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2008-09-11 19:29:00 +02:00
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#include <usb/usbdisk.h>
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2008-09-02 18:06:22 +02:00
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/**
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* Initializes USB controller attached to PCI
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*
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* @param bus PCI bus number
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* @param dev PCI device id at bus
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* @param func function id of the controller
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*/
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2012-11-23 11:34:20 +01:00
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static int usb_controller_initialize(int bus, int dev, int func)
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2008-09-02 18:06:22 +02:00
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{
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u32 class;
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u32 devclass;
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u32 prog_if;
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pcidev_t addr;
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u32 pciid;
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addr = PCI_DEV (bus, dev, func);
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2012-10-08 10:58:37 +02:00
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class = pci_read_config32(addr, 8);
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pciid = pci_read_config32(addr, 0);
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2008-09-02 18:06:22 +02:00
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devclass = class >> 16;
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prog_if = (class >> 8) & 0xff;
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/* enable busmaster */
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#define PCI_COMMAND 4
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#define PCI_COMMAND_MASTER 4
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if (devclass == 0xc03) {
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2010-03-25 23:17:36 +01:00
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u32 pci_command;
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2012-10-08 10:58:37 +02:00
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pci_command = pci_read_config32(addr, PCI_COMMAND);
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2010-03-25 23:17:36 +01:00
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pci_command |= PCI_COMMAND_MASTER;
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pci_write_config32(addr, PCI_COMMAND, pci_command);
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2012-12-11 21:08:07 +01:00
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usb_debug("%02x:%02x.%x %04x:%04x.%d ", bus, dev, func,
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2008-09-02 18:06:22 +02:00
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pciid >> 16, pciid & 0xFFFF, func);
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2012-10-08 10:58:37 +02:00
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switch (prog_if) {
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case 0x00:
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2008-09-02 18:06:22 +02:00
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#ifdef CONFIG_USB_UHCI
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2012-12-11 21:08:07 +01:00
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usb_debug("UHCI controller\n");
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2012-10-08 10:58:37 +02:00
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uhci_init (addr);
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2008-09-02 18:06:22 +02:00
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#else
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2012-12-11 21:08:07 +01:00
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usb_debug("UHCI controller (not supported)\n");
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2008-09-02 18:06:22 +02:00
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#endif
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2012-10-08 10:58:37 +02:00
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break;
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2011-07-14 03:59:31 +02:00
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2012-10-08 10:58:37 +02:00
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case 0x10:
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2008-09-02 18:06:22 +02:00
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#ifdef CONFIG_USB_OHCI
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2012-12-11 21:08:07 +01:00
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usb_debug("OHCI controller\n");
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2012-10-08 10:58:37 +02:00
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ohci_init(addr);
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2008-09-02 18:06:22 +02:00
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#else
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2012-12-11 21:08:07 +01:00
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usb_debug("OHCI controller (not supported)\n");
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2008-09-02 18:06:22 +02:00
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#endif
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2012-10-08 10:58:37 +02:00
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break;
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2008-09-02 18:06:22 +02:00
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2012-10-08 10:58:37 +02:00
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case 0x20:
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2008-09-02 18:06:22 +02:00
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#ifdef CONFIG_USB_EHCI
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2012-12-11 21:08:07 +01:00
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usb_debug("EHCI controller\n");
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2012-10-08 10:58:37 +02:00
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ehci_init(addr);
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2010-03-25 23:17:36 +01:00
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#else
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2012-12-11 21:08:07 +01:00
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usb_debug("EHCI controller (not supported)\n");
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2010-03-25 23:17:36 +01:00
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#endif
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2012-10-08 10:58:37 +02:00
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break;
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2010-03-25 23:17:36 +01:00
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2012-10-08 10:58:37 +02:00
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case 0x30:
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2010-03-25 23:17:36 +01:00
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#ifdef CONFIG_USB_XHCI
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2012-12-11 21:08:07 +01:00
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usb_debug("xHCI controller\n");
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2012-10-08 10:58:37 +02:00
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xhci_init(addr);
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2008-09-02 18:06:22 +02:00
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#else
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2012-12-11 21:08:07 +01:00
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usb_debug("xHCI controller (not supported)\n");
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2008-09-02 18:06:22 +02:00
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#endif
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2012-10-08 10:58:37 +02:00
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break;
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2008-09-02 18:06:22 +02:00
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2012-10-08 10:58:37 +02:00
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default:
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2012-12-11 21:08:07 +01:00
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usb_debug("unknown controller %x not supported\n",
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2012-10-08 10:58:37 +02:00
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prog_if);
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break;
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2008-09-02 18:06:22 +02:00
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}
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}
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return 0;
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}
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2012-10-08 10:58:37 +02:00
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static void usb_scan_pci_bus(int bus)
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{
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int dev, func;
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for (dev = 0; dev < 32; dev++) {
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u8 header_type;
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pcidev_t addr = PCI_DEV(bus, dev, 0);
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/* Check if there's a device here at all. */
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if (pci_read_config32(addr, REG_VENDOR_ID) == 0xffff)
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continue;
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header_type = pci_read_config8(addr, REG_HEADER_TYPE);
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/* If this is a bridge, scan the bus on the other side. */
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if ((header_type & ~HEADER_TYPE_MULTIFUNCTION) ==
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HEADER_TYPE_BRIDGE) {
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int sub_bus =
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pci_read_config8(addr, REG_SECONDARY_BUS);
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usb_scan_pci_bus(sub_bus);
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continue;
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}
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/*
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* EHCI is defined by standards to be at a higher function
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* than the USB1 controllers. We don't want to init USB1 +
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* devices just to "steal" those for USB2, so make sure USB2
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* comes first.
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*/
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/* Check for a multifunction device. */
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if (header_type & HEADER_TYPE_MULTIFUNCTION)
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for (func = 7; func > 0; func--)
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usb_controller_initialize(bus, dev, func);
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/* Initialize function 0. */
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usb_controller_initialize(bus, dev, 0);
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}
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}
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2008-09-02 18:06:22 +02:00
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/**
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* Initialize all USB controllers attached to PCI.
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*/
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2012-10-08 10:58:37 +02:00
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int usb_initialize(void)
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2008-09-02 18:06:22 +02:00
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{
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2012-10-08 10:58:37 +02:00
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usb_scan_pci_bus(0);
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2008-09-02 18:06:22 +02:00
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return 0;
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}
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