2020-04-03 01:21:09 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2014-03-02 18:40:36 +01:00
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#include <device/device.h>
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#include <arch/smp/mpspec.h>
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#include <arch/ioapic.h>
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static void *smp_write_config_table(void *v)
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{
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2016-09-22 21:20:54 +02:00
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struct mp_config_table *mc;
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2014-03-02 18:40:36 +01:00
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int isa_bus;
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2016-09-22 21:20:54 +02:00
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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2014-03-02 18:40:36 +01:00
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mptable_init(mc, LOCAL_APIC_ADDR);
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2016-09-22 21:20:54 +02:00
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smp_write_processors(mc);
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2014-03-02 18:40:36 +01:00
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mptable_write_buses(mc, NULL, &isa_bus);
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/* I/O APICs: APIC ID Version State Address */
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2014-12-25 03:43:20 +01:00
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smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
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2014-03-02 18:40:36 +01:00
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/* Legacy Interrupts */
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mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
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smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, isa_bus, 0x00, MP_APIC_ALL, 0x00);
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smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x00, MP_APIC_ALL, 0x01);
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2019-01-04 05:02:22 +01:00
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x01, 0x00, 0x02, 0x10); /* PCIe root 0.01.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x02, 0x00, 0x02, 0x10); /* VGA 0.02.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1b, 0x00, 0x02, 0x16); /* HD Audio 0:1b.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x00, 0x02, 0x11); /* PCIe 0:1c.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x01, 0x02, 0x10); /* PCIe 0:1c.1 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x02, 0x02, 0x12); /* PCIe 0:1c.2 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x03, 0x02, 0x13); /* PCIe 0:1c.3 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x00, 0x02, 0x15); /* USB 0:1d.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x01, 0x02, 0x13); /* USB 0:1d.1 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x02, 0x02, 0x12); /* USB 0:1d.2 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x03, 0x02, 0x10); /* USB 0:1d.3 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x00, 0x02, 0x12); /* LPC 0:1f.0 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x01, 0x02, 0x13); /* IDE 0:1f.1 */
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smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x03, 0x02, 0x10); /* SATA 0:1f.3 */
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smp_write_pci_intsrc(mc, mp_INT, 0x03, 0x03, 0x00, 0x02, 0x13); /* Firewire 3:03.0 */
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2014-03-02 18:40:36 +01:00
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mptable_lintsrc(mc, isa_bus);
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return mptable_finalize(mc);
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}
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unsigned long write_smp_table(unsigned long addr)
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{
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void *v;
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v = smp_write_floating_table(addr, 0);
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return (unsigned long)smp_write_config_table(v);
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}
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