2018-02-10 03:35:17 +01:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <baseboard/variants.h>
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#include <boardid.h>
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2018-07-25 16:06:21 +02:00
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#include <compiler.h>
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2018-02-10 03:35:17 +01:00
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#include <console/console.h>
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#include <device/device.h>
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2018-07-20 22:50:16 +02:00
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#include <ec/google/chromeec/ec.h>
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2018-02-10 03:35:17 +01:00
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#include <ec/ec.h>
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#include <nhlt.h>
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2018-07-20 22:50:16 +02:00
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#include <smbios.h>
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2018-07-25 16:06:21 +02:00
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#include <soc/cpu.h>
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2018-02-10 03:35:17 +01:00
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#include <soc/gpio.h>
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#include <soc/nhlt.h>
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2018-07-20 22:50:16 +02:00
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#include <string.h>
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2018-02-10 03:35:17 +01:00
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <variant/ec.h>
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#include <variant/gpio.h>
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static void mainboard_init(void *chip_info)
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{
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int boardid;
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const struct pad_config *pads;
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size_t num;
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boardid = board_id();
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printk(BIOS_INFO, "Board ID: %d\n", boardid);
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pads = variant_gpio_table(&num);
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gpio_configure_pads(pads, num);
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mainboard_ec_init();
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}
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static unsigned long mainboard_write_acpi_tables(
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2018-05-04 20:23:33 +02:00
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struct device *device, unsigned long current, acpi_rsdp_t *rsdp)
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2018-02-10 03:35:17 +01:00
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{
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uintptr_t start_addr;
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uintptr_t end_addr;
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struct nhlt *nhlt;
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start_addr = current;
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nhlt = nhlt_init();
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if (nhlt == NULL)
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return start_addr;
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variant_nhlt_init(nhlt);
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end_addr = nhlt_soc_serialize(nhlt, start_addr);
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if (end_addr != start_addr)
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acpi_add_table(rsdp, (void *)start_addr);
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return end_addr;
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}
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2018-05-04 20:23:33 +02:00
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static void mainboard_enable(struct device *dev)
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2018-02-10 03:35:17 +01:00
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{
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dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
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dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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.enable_dev = mainboard_enable,
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};
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2018-07-20 22:50:16 +02:00
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#define SKU_UNKNOWN 0xFFFFFFFF
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#define SKU_MAX 255
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static uint32_t get_board_sku(void)
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{
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static uint32_t sku_id = SKU_UNKNOWN;
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if (sku_id != SKU_UNKNOWN)
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return sku_id;
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if (google_chromeec_cbi_get_sku_id(&sku_id))
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sku_id = SKU_UNKNOWN;
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return sku_id;
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}
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const char *smbios_mainboard_sku(void)
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{
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static char sku_str[7]; /* sku{0..255} */
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uint32_t sku_id = get_board_sku();
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if ((sku_id == SKU_UNKNOWN) || (sku_id > SKU_MAX)) {
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printk(BIOS_ERR, "%s: Unexpected SKU ID %u\n",
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__func__, sku_id);
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return "";
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}
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snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id);
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return sku_str;
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}
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2018-07-25 16:06:21 +02:00
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void __weak variant_update_devtree(struct device *dev)
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{
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/* Place holder for common updates. */
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}
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void mainboard_devtree_update(struct device *dev)
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{
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/* Defer to variant for board-specific updates. */
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variant_update_devtree(dev);
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}
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