65 lines
1.8 KiB
C
65 lines
1.8 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/mmu.h>
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#include <compiler.h>
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#include <symbols.h>
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#include <soc/emi.h>
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#include <soc/mmu_operations.h>
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__weak void mtk_soc_after_dram(void) { /* do nothing */ }
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void mtk_mmu_init(void)
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{
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mmu_init();
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/* Set 0x0 to the end of 2GB dram address as device memory */
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mmu_config_range((void *)0, (uintptr_t)_dram + 2U * GiB, DEV_MEM);
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/* SRAM is cached */
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mmu_config_range(_sram, _sram_size, CACHED_MEM);
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/* L2C SRAM is cached */
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mmu_config_range(_sram_l2c, _sram_l2c_size, CACHED_MEM);
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/* DMA is non-cached and is reserved for TPM & da9212 I2C DMA */
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mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM);
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mmu_enable();
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}
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void mtk_mmu_after_dram(void)
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{
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/* Map DRAM as cached now that it's up and running */
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mmu_config_range(_dram, (uintptr_t)sdram_size(), CACHED_MEM);
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mtk_soc_after_dram();
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}
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void mtk_mmu_disable_l2c_sram(void)
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{
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/* Unmap L2C SRAM so it can be reclaimed by L2 cache */
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/* TODO: Implement true unmapping, and also use it for the zero-page! */
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mmu_config_range(_sram_l2c, _sram_l2c_size, DEV_MEM);
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/* Careful: changing cache geometry while it's active is a bad idea! */
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mmu_disable();
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mtk_soc_disable_l2c_sram();
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/* Reenable MMU with now enlarged L2 cache. Page tables still valid. */
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mmu_enable();
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}
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