2020-11-05 06:22:46 +01:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2020-11-10 21:39:37 +01:00
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#include <device/pci_type.h>
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2020-11-05 06:22:46 +01:00
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#include <intelblocks/xhci.h>
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2020-11-10 21:39:37 +01:00
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#include <soc/pci_devs.h>
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2020-11-05 06:22:46 +01:00
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2020-11-10 21:39:37 +01:00
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#define PCH_XHCI_USB2_PORT_STATUS_REG 0x480
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#define PCH_XHCI_USB3_PORT_STATUS_REG 0x520
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#define PCH_XHCI_USB2_PORT_NUM 10
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#define PCH_XHCI_USB3_PORT_NUM 4
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2020-11-05 06:22:46 +01:00
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2020-11-10 21:39:37 +01:00
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#define TCSS_XHCI_USB2_PORT_STATUS_REG 0x480
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#define TCSS_XHCI_USB3_PORT_STATUS_REG 0x490
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#define TCSS_XHCI_USB2_PORT_NUM 1
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#define TCSS_XHCI_USB3_PORT_NUM 4
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static const struct xhci_usb_info pch_usb_info = {
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.usb2_port_status_reg = PCH_XHCI_USB2_PORT_STATUS_REG,
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.num_usb2_ports = PCH_XHCI_USB2_PORT_NUM,
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.usb3_port_status_reg = PCH_XHCI_USB3_PORT_STATUS_REG,
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.num_usb3_ports = PCH_XHCI_USB3_PORT_NUM,
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};
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static const struct xhci_usb_info tcss_usb_info = {
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.usb2_port_status_reg = TCSS_XHCI_USB2_PORT_STATUS_REG,
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.num_usb2_ports = TCSS_XHCI_USB2_PORT_NUM,
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.usb3_port_status_reg = TCSS_XHCI_USB3_PORT_STATUS_REG,
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.num_usb3_ports = TCSS_XHCI_USB3_PORT_NUM,
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2020-11-05 06:22:46 +01:00
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};
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2020-11-10 21:39:37 +01:00
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const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
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2020-11-05 06:22:46 +01:00
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{
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2020-11-10 21:39:37 +01:00
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if (xhci_dev == PCH_DEVFN_XHCI)
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return &pch_usb_info;
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else if (xhci_dev == SA_DEVFN_TCSS_XHCI)
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return &tcss_usb_info;
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return NULL;
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2020-11-05 06:22:46 +01:00
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}
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