2010-03-14 18:01:08 +01:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Eric Biederman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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2013-02-23 18:37:27 +01:00
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2010-03-14 18:01:08 +01:00
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*/
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2010-02-27 02:50:21 +01:00
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#ifndef I82801DX_CHIP_H
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#define I82801DX_CHIP_H
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2010-03-14 18:01:08 +01:00
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struct southbridge_intel_i82801dx_config {
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2010-02-27 02:50:21 +01:00
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int enable_usb;
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int enable_native_ide;
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/**
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* Interrupt Routing configuration
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* If bit7 is 1, the interrupt is disabled.
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*/
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uint8_t pirqa_routing;
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uint8_t pirqb_routing;
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uint8_t pirqc_routing;
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uint8_t pirqd_routing;
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uint8_t pirqe_routing;
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uint8_t pirqf_routing;
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uint8_t pirqg_routing;
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uint8_t pirqh_routing;
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uint8_t ide0_enable;
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uint8_t ide1_enable;
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};
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2010-03-14 18:01:08 +01:00
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#endif /* I82801DBM_CHIP_H */
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