56 lines
1.7 KiB
C
56 lines
1.7 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Rockchip Inc.
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <bootblock_common.h>
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#include <soc/clock.h>
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#include <soc/i2c.h>
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#include <soc/grf.h>
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#include <soc/pmu.h>
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#include <soc/rk808.h>
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#include <soc/spi.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "board.h"
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void bootblock_mainboard_init(void)
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{
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/* cpu frequency will up to 1.8GHz, so the buck1 must up to 1.3v */
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setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
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setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
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i2c_init(PMIC_BUS, 400*KHz);
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rk808_configure_buck(PMIC_BUS, 1, 1300);
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rkclk_configure_cpu();
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/* i2c1 for tpm */
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writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
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/* spi2 for firmware ROM */
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writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk);
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writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx);
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rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11*MHz);
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/* spi0 for chrome ec */
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writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0);
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rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 9*MHz);
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setup_chromeos_gpios();
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}
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