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coreboot-kgpe-d16/Documentation/mainboard/intel/kblrvp11.md

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Documentation/../../kblrvp11: Add RVP11 documentation Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd Reviewed-on: https://review.coreboot.org/c/29859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
2018-11-27 19:05:52 +01:00
# Intel Kaby lake RVP11
## Specs
* 1 SATA cable connect
* 1 SATAe direct
* 2 USB2.0 connector
* 4 USB3.0 connector
* 1 Gigabit Ethernet
* 1 x4 PCIe slot
* 1 x1 PCIe slot
* 1 X16 PEG slot
* UART debug DB9 connector
* 4 DIMMS with DDR4 memory
* SPI flash
* Audio Jack
* PS2 Keyboard and Mouse
* Display: HDMI, DP, VGA
## Target Audience
* OEMs, internal only
## Flashing coreboot
```eval_rst
+---------------------+------------+
| Type | Value |
+=====================+============+
| Socketed flash | no |
+---------------------+------------+
| Vendor | Winbond |
+---------------------+------------+
| Model | W25Q128FV |
+---------------------+------------+
| Size | 16 MiB |
+---------------------+------------+
| Package | SOIC-8 |
+---------------------+------------+
| Write protection | No |
+---------------------+------------+
| Dual BIOS feature | No |
+---------------------+------------+
```
### Instruction to flash coreboot to SPI
### Internal programming
The SPI flash can be accessed internally using [flashrom].
The following command is used to flash BIOS region.
```bash
$ flashrom -p internal --ifd -i bios -w coreboot.rom --noverify-all
```
### External programming
1. Dediprog SF600 with adapter B is used.
2. Make sure power supply is disconnected from board.
3. Connect Dediprog SF600 to header at J7H1.
4. Ensure that "currently working on" is in "application memory chip 1"
Documentation: Use correct KiB/MiB units instead of KB/MB Fix a common mistake of using KB/MB where KiB/MiB is what actually is meant. 1 MB = (10^3)^2 = 1000000 1 MiB = (2^10)^2 = 1048576 Change-Id: I78327652b6c6526318071a9d4bafd7ec279ea614 Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39685 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-20 00:57:00 +01:00
5. Go to "file" and select the .rom file (16 MiB) to program chip1.
Documentation/../../kblrvp11: Add RVP11 documentation Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd Reviewed-on: https://review.coreboot.org/c/29859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
2018-11-27 19:05:52 +01:00
6. Execute the batch operation to erase and program the chip.
## Technology
```eval_rst
+------------------+---------------------------------------------------+
Documentation/mb/intel/kblrvp11: Fix table formatting Without this patch, Sphinx 1.7.9 prints the following warning, and doesn't emit the table as HTML: /.../Documentation/mainboard/intel/kblrvp11.md:1: WARNING: Malformed table. +------------------+---------------------------------------------------+ | CPU | Kaby lake H (i7-7820EQ) | +------------------+---------------------------------------------------+ | PCH | Skylake PCH-H (called SPT-H) | +------------------+---------------------------------------------------+ | Coprocessor | Intel ME | +------------------+---------------------------------------------------+ Change-Id: I17920398126d57eb8815c45e4a0d4b100f46004a Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-20 11:56:04 +01:00
| CPU | Kaby lake H (i7-7820EQ) |
Documentation/../../kblrvp11: Add RVP11 documentation Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd Reviewed-on: https://review.coreboot.org/c/29859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
2018-11-27 19:05:52 +01:00
+------------------+---------------------------------------------------+
| PCH | Skylake PCH-H (called SPT-H) |
+------------------+---------------------------------------------------+
| Coprocessor | Intel ME |
+------------------+---------------------------------------------------+
```
[W25Q128FV]: https://www.winbond.com/resource-files/w25q128fv%20rev.m%2005132016%20kms.pdf
[flashrom]: https://flashrom.org/Flashrom