2014-08-15 20:38:21 +02:00
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/*
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* This file is part of the coreboot project.
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*
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2015-03-12 20:41:44 +01:00
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* Copyright (C) 2012 - 2014 Advanced Micro Devices, Inc.
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2014-08-15 20:38:21 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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2015-03-12 20:41:44 +01:00
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#include <AGESA.h>
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#include <cpu/amd/pi/s3_resume.h>
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2014-08-15 20:38:21 +02:00
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#include <cpu/x86/mtrr.h>
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2015-03-12 20:41:44 +01:00
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#include <cpuRegisters.h>
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#include <FchPlatform.h>
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#include <heapManager.h>
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2014-10-22 07:05:36 +02:00
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#include <northbridge/amd/pi/agesawrapper.h>
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2014-10-21 17:22:32 +02:00
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#include <northbridge/amd/pi/BiosCallOuts.h>
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2014-08-15 20:38:21 +02:00
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VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
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VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);
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#define FILECODE UNASSIGNED_FILE_FILECODE
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2014-10-22 05:42:57 +02:00
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#ifndef __PRE_RAM__
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2014-08-15 20:38:21 +02:00
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/* ACPI table pointers returned by AmdInitLate */
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2014-10-22 05:42:57 +02:00
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static void *DmiTable = NULL;
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static void *AcpiPstate = NULL;
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static void *AcpiSrat = NULL;
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static void *AcpiSlit = NULL;
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2014-08-15 20:38:21 +02:00
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2014-10-22 05:42:57 +02:00
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static void *AcpiWheaMce = NULL;
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static void *AcpiWheaCmc = NULL;
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static void *AcpiAlib = NULL;
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static void *AcpiIvrs = NULL;
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2015-03-12 20:41:44 +01:00
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static void *AcpiCrat = NULL;
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#endif /* #ifndef __PRE_RAM__ */
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2014-08-15 20:38:21 +02:00
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AGESA_STATUS agesawrapper_amdinitreset(void)
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{
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AGESA_STATUS status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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AMD_RESET_PARAMS AmdResetParams;
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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LibAmdMemFill (&AmdResetParams,
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0,
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sizeof (AMD_RESET_PARAMS),
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&(AmdResetParams.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
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AmdParamStruct.AllocationMethod = ByHost;
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AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS);
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AmdParamStruct.NewStructPtr = &AmdResetParams;
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AmdParamStruct.StdHeader.AltImageBasePtr = 0;
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.FchInterface.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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2015-03-12 20:41:44 +01:00
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if (IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON))
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AmdResetParams.FchInterface.Xhci1Enable = TRUE;
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AmdResetParams.FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
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AmdResetParams.FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
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2014-08-15 20:38:21 +02:00
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2015-03-12 20:41:44 +01:00
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status = AmdInitReset(&AmdResetParams);
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2014-08-15 20:38:21 +02:00
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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AmdReleaseStruct (&AmdParamStruct);
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return status;
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}
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AGESA_STATUS agesawrapper_amdinitearly(void)
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{
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AGESA_STATUS status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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AMD_EARLY_PARAMS *AmdEarlyParamsPtr;
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
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AmdParamStruct.AllocationMethod = PreMemHeap;
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AmdParamStruct.StdHeader.AltImageBasePtr = 0;
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr;
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OemCustomizeInitEarly (AmdEarlyParamsPtr);
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status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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AmdReleaseStruct (&AmdParamStruct);
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return status;
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}
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AGESA_STATUS agesawrapper_amdinitpost(void)
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{
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AGESA_STATUS status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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AMD_POST_PARAMS *PostParams;
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
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AmdParamStruct.AllocationMethod = PreMemHeap;
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2015-03-12 20:41:44 +01:00
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AmdParamStruct.StdHeader.AltImageBasePtr = NULL;
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2014-08-15 20:38:21 +02:00
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr;
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// Do not use IS_ENABLED here. CONFIG_GFXUMA should always have a value. Allow
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// the compiler to flag the error if CONFIG_GFXUMA is not set.
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PostParams->MemConfig.UmaMode = CONFIG_GFXUMA ? UMA_AUTO : UMA_NONE;
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PostParams->MemConfig.UmaSize = 0;
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status = AmdInitPost (PostParams);
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2015-03-12 20:41:44 +01:00
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printk(
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BIOS_SPEW,
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"setup_uma_memory: umamode %s\n",
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(PostParams->MemConfig.UmaMode == UMA_AUTO) ? "UMA_AUTO" :
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(PostParams->MemConfig.UmaMode == UMA_SPECIFIED) ? "UMA_SPECIFIED" :
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(PostParams->MemConfig.UmaMode == UMA_NONE) ? "UMA_NONE" :
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"unknown"
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);
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2014-08-15 20:38:21 +02:00
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printk(
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BIOS_SPEW,
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"setup_uma_memory: syslimit 0x%08llX, bottomio 0x%08lx\n",
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(unsigned long long)(PostParams->MemConfig.SysLimit) << 16,
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(unsigned long)(PostParams->MemConfig.BottomIo) << 16
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);
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printk(
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BIOS_SPEW,
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"setup_uma_memory: uma size %luMB, uma start 0x%08lx\n",
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(unsigned long)(PostParams->MemConfig.UmaSize) >> (20 - 16),
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(unsigned long)(PostParams->MemConfig.UmaBase) << 16
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);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus);
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AmdReleaseStruct (&AmdParamStruct);
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/* Initialize heap space */
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EmptyHeap();
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return status;
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}
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AGESA_STATUS agesawrapper_amdinitenv(void)
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{
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AGESA_STATUS status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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AMD_ENV_PARAMS *EnvParam;
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
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AmdParamStruct.AllocationMethod = PostMemDram;
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AmdParamStruct.StdHeader.AltImageBasePtr = 0;
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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status = AmdCreateStruct (&AmdParamStruct);
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EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr;
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2015-03-12 20:41:44 +01:00
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EnvParam->FchInterface.AzaliaController = AzEnable;
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EnvParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE;
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EnvParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
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EnvParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
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EnvParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3);
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2014-12-08 09:43:23 +01:00
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EnvParam->GnbEnvConfiguration.IommuSupport = FALSE;
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2014-08-15 20:38:21 +02:00
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status = AmdInitEnv (EnvParam);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(EnvParam->StdHeader.HeapStatus);
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/* Initialize Subordinate Bus Number and Secondary Bus Number
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* In platform BIOS this address is allocated by PCI enumeration code
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Modify D1F0x18
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*/
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return status;
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}
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2014-10-22 05:42:57 +02:00
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#ifndef __PRE_RAM__
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2014-08-15 20:38:21 +02:00
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VOID* agesawrapper_getlateinitptr (int pick)
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{
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switch (pick) {
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case PICK_DMI:
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return DmiTable;
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case PICK_PSTATE:
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return AcpiPstate;
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case PICK_SRAT:
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return AcpiSrat;
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case PICK_SLIT:
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return AcpiSlit;
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case PICK_WHEA_MCE:
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return AcpiWheaMce;
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case PICK_WHEA_CMC:
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return AcpiWheaCmc;
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case PICK_ALIB:
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return AcpiAlib;
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case PICK_IVRS:
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return AcpiIvrs;
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2015-03-12 20:41:44 +01:00
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case PICK_CRAT:
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return AcpiCrat;
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2014-08-15 20:38:21 +02:00
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default:
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return NULL;
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}
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}
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2015-03-12 20:41:44 +01:00
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#endif /* #ifndef __PRE_RAM__ */
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2014-08-15 20:38:21 +02:00
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AGESA_STATUS agesawrapper_amdinitmid(void)
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{
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AGESA_STATUS status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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2015-03-12 20:41:44 +01:00
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AMD_MID_PARAMS *MidParam;
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2014-08-15 20:38:21 +02:00
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/* Enable MMIO on AMD CPU Address Map Controller */
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2015-03-13 16:29:20 +01:00
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amd_initcpuio ();
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2014-08-15 20:38:21 +02:00
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
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AmdParamStruct.AllocationMethod = PostMemDram;
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AmdParamStruct.StdHeader.AltImageBasePtr = 0;
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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2015-03-12 20:41:44 +01:00
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MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr;
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MidParam->GnbMidConfiguration.iGpuVgaMode = 0;/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
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MidParam->GnbMidConfiguration.GnbIoapicAddress = 0xFEC20000;
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MidParam->FchInterface.AzaliaController = AzEnable;
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MidParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE;
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MidParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
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MidParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
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MidParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3);
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2014-08-15 20:38:21 +02:00
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status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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AmdReleaseStruct (&AmdParamStruct);
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return status;
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}
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2014-10-22 05:42:57 +02:00
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#ifndef __PRE_RAM__
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2014-08-15 20:38:21 +02:00
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AGESA_STATUS agesawrapper_amdinitlate(void)
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{
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AGESA_STATUS Status;
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AMD_INTERFACE_PARAMS AmdParamStruct;
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AMD_LATE_PARAMS *AmdLateParams;
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LibAmdMemFill (&AmdParamStruct,
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0,
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sizeof (AMD_INTERFACE_PARAMS),
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&(AmdParamStruct.StdHeader));
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AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
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AmdParamStruct.AllocationMethod = PostMemDram;
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AmdParamStruct.StdHeader.AltImageBasePtr = 0;
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AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
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AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
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AmdParamStruct.StdHeader.Func = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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/* NOTE: if not call amdcreatestruct, the initializer(AmdInitLateInitializer) would not be called */
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AmdCreateStruct(&AmdParamStruct);
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AmdLateParams = (AMD_LATE_PARAMS *)AmdParamStruct.NewStructPtr;
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Status = AmdInitLate(AmdLateParams);
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if (Status != AGESA_SUCCESS) {
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agesawrapper_amdreadeventlog(AmdLateParams->StdHeader.HeapStatus);
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ASSERT(Status == AGESA_SUCCESS);
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}
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DmiTable = AmdLateParams->DmiTable;
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AcpiPstate = AmdLateParams->AcpiPState;
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AcpiSrat = AmdLateParams->AcpiSrat;
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AcpiSlit = AmdLateParams->AcpiSlit;
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|
|
AcpiWheaMce = AmdLateParams->AcpiWheaMce;
|
|
|
|
AcpiWheaCmc = AmdLateParams->AcpiWheaCmc;
|
|
|
|
AcpiAlib = AmdLateParams->AcpiAlib;
|
|
|
|
AcpiIvrs = AmdLateParams->AcpiIvrs;
|
2015-03-12 20:41:44 +01:00
|
|
|
AcpiCrat = AmdLateParams->AcpiCrat;
|
2014-08-15 20:38:21 +02:00
|
|
|
|
|
|
|
printk(BIOS_DEBUG, "DmiTable:%x, AcpiPstatein: %x, AcpiSrat:%x,"
|
|
|
|
"AcpiSlit:%x, Mce:%x, Cmc:%x,"
|
|
|
|
"Alib:%x, AcpiIvrs:%x in %s\n",
|
|
|
|
(unsigned int)DmiTable, (unsigned int)AcpiPstate, (unsigned int)AcpiSrat,
|
|
|
|
(unsigned int)AcpiSlit, (unsigned int)AcpiWheaMce, (unsigned int)AcpiWheaCmc,
|
|
|
|
(unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__);
|
|
|
|
|
|
|
|
/* AmdReleaseStruct (&AmdParamStruct); */
|
|
|
|
return Status;
|
|
|
|
}
|
2015-03-12 20:41:44 +01:00
|
|
|
#endif /* #ifndef __PRE_RAM__ */
|
2014-08-15 20:38:21 +02:00
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_amdlaterunaptask (
|
|
|
|
UINT32 Func,
|
|
|
|
UINT32 Data,
|
|
|
|
VOID *ConfigPtr
|
|
|
|
)
|
|
|
|
{
|
|
|
|
AGESA_STATUS Status;
|
|
|
|
AP_EXE_PARAMS ApExeParams;
|
|
|
|
|
|
|
|
LibAmdMemFill (&ApExeParams,
|
|
|
|
0,
|
|
|
|
sizeof (AP_EXE_PARAMS),
|
|
|
|
&(ApExeParams.StdHeader));
|
|
|
|
|
|
|
|
ApExeParams.StdHeader.AltImageBasePtr = 0;
|
|
|
|
ApExeParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
ApExeParams.StdHeader.Func = 0;
|
|
|
|
ApExeParams.StdHeader.ImageBasePtr = 0;
|
|
|
|
ApExeParams.FunctionNumber = Func;
|
|
|
|
ApExeParams.RelatedDataBlock = ConfigPtr;
|
|
|
|
|
|
|
|
Status = AmdLateRunApTask (&ApExeParams);
|
|
|
|
if (Status != AGESA_SUCCESS) {
|
|
|
|
/* agesawrapper_amdreadeventlog(); */
|
|
|
|
ASSERT(Status == AGESA_SUCCESS);
|
|
|
|
}
|
|
|
|
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if CONFIG_HAVE_ACPI_RESUME
|
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_amdinitresume(void)
|
|
|
|
{
|
|
|
|
AGESA_STATUS status;
|
|
|
|
AMD_INTERFACE_PARAMS AmdParamStruct;
|
|
|
|
AMD_RESUME_PARAMS *AmdResumeParamsPtr;
|
|
|
|
S3_DATA_TYPE S3DataType;
|
|
|
|
|
|
|
|
LibAmdMemFill (&AmdParamStruct,
|
|
|
|
0,
|
|
|
|
sizeof (AMD_INTERFACE_PARAMS),
|
|
|
|
&(AmdParamStruct.StdHeader));
|
|
|
|
|
|
|
|
AmdParamStruct.AgesaFunctionName = AMD_INIT_RESUME;
|
|
|
|
AmdParamStruct.AllocationMethod = PreMemHeap;
|
|
|
|
AmdParamStruct.StdHeader.AltImageBasePtr = 0;
|
|
|
|
AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
AmdParamStruct.StdHeader.Func = 0;
|
|
|
|
AmdParamStruct.StdHeader.ImageBasePtr = 0;
|
|
|
|
AmdCreateStruct (&AmdParamStruct);
|
|
|
|
|
|
|
|
AmdResumeParamsPtr = (AMD_RESUME_PARAMS *)AmdParamStruct.NewStructPtr;
|
|
|
|
|
|
|
|
AmdResumeParamsPtr->S3DataBlock.NvStorageSize = 0;
|
|
|
|
AmdResumeParamsPtr->S3DataBlock.VolatileStorageSize = 0;
|
|
|
|
S3DataType = S3DataTypeNonVolatile;
|
|
|
|
OemAgesaGetS3Info (S3DataType,
|
|
|
|
(u32 *) &AmdResumeParamsPtr->S3DataBlock.NvStorageSize,
|
|
|
|
(void **) &AmdResumeParamsPtr->S3DataBlock.NvStorage);
|
|
|
|
|
|
|
|
status = AmdInitResume ((AMD_RESUME_PARAMS *)AmdParamStruct.NewStructPtr);
|
|
|
|
|
|
|
|
if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
|
|
|
|
AmdReleaseStruct (&AmdParamStruct);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef __PRE_RAM__
|
|
|
|
AGESA_STATUS agesawrapper_fchs3earlyrestore(void)
|
|
|
|
{
|
|
|
|
AGESA_STATUS status = AGESA_SUCCESS;
|
|
|
|
|
|
|
|
FCH_DATA_BLOCK FchParams;
|
|
|
|
AMD_CONFIG_PARAMS StdHeader;
|
|
|
|
|
|
|
|
StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
|
|
|
|
StdHeader.HeapBasePtr = GetHeapBase(&StdHeader) + 0x10;
|
|
|
|
StdHeader.AltImageBasePtr = 0;
|
|
|
|
StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
StdHeader.Func = 0;
|
|
|
|
StdHeader.ImageBasePtr = 0;
|
|
|
|
|
2015-03-12 20:41:44 +01:00
|
|
|
LibAmdMemFill (&FchParams,
|
|
|
|
0,
|
|
|
|
sizeof (FchParams),
|
|
|
|
&StdHeader);
|
|
|
|
|
2014-08-15 20:38:21 +02:00
|
|
|
FchParams.StdHeader = &StdHeader;
|
|
|
|
s3_resume_init_data(&FchParams);
|
|
|
|
|
|
|
|
FchInitS3EarlyRestore(&FchParams);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
2015-03-12 20:41:44 +01:00
|
|
|
#endif /* #ifndef __PRE_RAM__ */
|
2014-08-15 20:38:21 +02:00
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_amds3laterestore(void)
|
|
|
|
{
|
|
|
|
AGESA_STATUS Status;
|
|
|
|
AMD_INTERFACE_PARAMS AmdInterfaceParams;
|
|
|
|
AMD_S3LATE_PARAMS AmdS3LateParams;
|
|
|
|
AMD_S3LATE_PARAMS *AmdS3LateParamsPtr;
|
|
|
|
S3_DATA_TYPE S3DataType;
|
|
|
|
|
|
|
|
agesawrapper_amdinitcpuio();
|
|
|
|
LibAmdMemFill (&AmdS3LateParams,
|
|
|
|
0,
|
|
|
|
sizeof (AMD_S3LATE_PARAMS),
|
|
|
|
&(AmdS3LateParams.StdHeader));
|
|
|
|
AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
|
|
|
|
AmdInterfaceParams.AllocationMethod = ByHost;
|
|
|
|
AmdInterfaceParams.AgesaFunctionName = AMD_S3LATE_RESTORE;
|
|
|
|
AmdInterfaceParams.NewStructPtr = &AmdS3LateParams;
|
|
|
|
AmdInterfaceParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
AmdS3LateParamsPtr = &AmdS3LateParams;
|
|
|
|
AmdInterfaceParams.NewStructSize = sizeof (AMD_S3LATE_PARAMS);
|
|
|
|
|
|
|
|
AmdCreateStruct (&AmdInterfaceParams);
|
|
|
|
|
|
|
|
AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize = 0;
|
|
|
|
S3DataType = S3DataTypeVolatile;
|
|
|
|
|
|
|
|
OemAgesaGetS3Info (S3DataType,
|
|
|
|
(u32 *) &AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize,
|
|
|
|
(void **) &AmdS3LateParamsPtr->S3DataBlock.VolatileStorage);
|
|
|
|
|
|
|
|
Status = AmdS3LateRestore (AmdS3LateParamsPtr);
|
|
|
|
if (Status != AGESA_SUCCESS) {
|
|
|
|
agesawrapper_amdreadeventlog(AmdInterfaceParams.StdHeader.HeapStatus);
|
|
|
|
ASSERT(Status == AGESA_SUCCESS);
|
|
|
|
}
|
|
|
|
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef __PRE_RAM__
|
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_fchs3laterestore(void)
|
|
|
|
{
|
|
|
|
AGESA_STATUS status = AGESA_SUCCESS;
|
|
|
|
|
2015-03-12 20:41:44 +01:00
|
|
|
AMD_CONFIG_PARAMS StdHeader;
|
|
|
|
FCH_DATA_BLOCK FchParams;
|
2014-08-15 20:38:21 +02:00
|
|
|
|
|
|
|
StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
|
|
|
|
StdHeader.HeapBasePtr = GetHeapBase(&StdHeader) + 0x10;
|
|
|
|
StdHeader.AltImageBasePtr = 0;
|
|
|
|
StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
StdHeader.Func = 0;
|
|
|
|
StdHeader.ImageBasePtr = 0;
|
|
|
|
|
2015-03-12 20:41:44 +01:00
|
|
|
LibAmdMemFill (&FchParams,
|
|
|
|
0,
|
|
|
|
sizeof (FchParams),
|
|
|
|
&StdHeader);
|
|
|
|
|
2014-08-15 20:38:21 +02:00
|
|
|
FchParams.StdHeader = &StdHeader;
|
|
|
|
s3_resume_init_data(&FchParams);
|
|
|
|
FchInitS3LateRestore(&FchParams);
|
2015-03-12 20:41:44 +01:00
|
|
|
|
2014-08-15 20:38:21 +02:00
|
|
|
/* PIC IRQ routine */
|
|
|
|
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
|
|
|
|
outb(byte, 0xC00);
|
|
|
|
outb(picr_data[byte], 0xC01);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* APIC IRQ routine */
|
|
|
|
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
|
|
|
|
outb(byte | 0x80, 0xC00);
|
|
|
|
outb(intr_data[byte], 0xC01);
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_amdS3Save(void)
|
|
|
|
{
|
|
|
|
AGESA_STATUS Status;
|
|
|
|
AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr;
|
|
|
|
AMD_INTERFACE_PARAMS AmdInterfaceParams;
|
|
|
|
S3_DATA_TYPE S3DataType;
|
|
|
|
|
|
|
|
LibAmdMemFill (&AmdInterfaceParams,
|
|
|
|
0,
|
|
|
|
sizeof (AMD_INTERFACE_PARAMS),
|
|
|
|
&(AmdInterfaceParams.StdHeader));
|
|
|
|
|
|
|
|
AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
|
|
|
|
AmdInterfaceParams.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
|
|
|
|
AmdInterfaceParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
AmdInterfaceParams.AllocationMethod = PostMemDram;
|
|
|
|
AmdInterfaceParams.AgesaFunctionName = AMD_S3_SAVE;
|
|
|
|
AmdInterfaceParams.StdHeader.AltImageBasePtr = 0;
|
|
|
|
AmdInterfaceParams.StdHeader.Func = 0;
|
|
|
|
|
|
|
|
AmdCreateStruct(&AmdInterfaceParams);
|
|
|
|
AmdS3SaveParamsPtr = (AMD_S3SAVE_PARAMS *)AmdInterfaceParams.NewStructPtr;
|
|
|
|
AmdS3SaveParamsPtr->StdHeader = AmdInterfaceParams.StdHeader;
|
|
|
|
|
|
|
|
Status = AmdS3Save(AmdS3SaveParamsPtr);
|
|
|
|
if (Status != AGESA_SUCCESS) {
|
|
|
|
agesawrapper_amdreadeventlog(AmdInterfaceParams.StdHeader.HeapStatus);
|
|
|
|
ASSERT(Status == AGESA_SUCCESS);
|
|
|
|
}
|
|
|
|
|
|
|
|
S3DataType = S3DataTypeNonVolatile;
|
|
|
|
printk(BIOS_DEBUG, "NvStorageSize=%x, NvStorage=%x\n",
|
|
|
|
(unsigned int)AmdS3SaveParamsPtr->S3DataBlock.NvStorageSize,
|
|
|
|
(unsigned int)AmdS3SaveParamsPtr->S3DataBlock.NvStorage);
|
|
|
|
|
2015-03-12 20:41:44 +01:00
|
|
|
Status = OemAgesaSaveS3Info (
|
|
|
|
S3DataType,
|
|
|
|
AmdS3SaveParamsPtr->S3DataBlock.NvStorageSize,
|
|
|
|
AmdS3SaveParamsPtr->S3DataBlock.NvStorage);
|
2014-08-15 20:38:21 +02:00
|
|
|
|
|
|
|
printk(BIOS_DEBUG, "VolatileStorageSize=%x, VolatileStorage=%x\n",
|
|
|
|
(unsigned int)AmdS3SaveParamsPtr->S3DataBlock.VolatileStorageSize,
|
|
|
|
(unsigned int)AmdS3SaveParamsPtr->S3DataBlock.VolatileStorage);
|
|
|
|
|
|
|
|
if (AmdS3SaveParamsPtr->S3DataBlock.VolatileStorageSize != 0) {
|
|
|
|
S3DataType = S3DataTypeVolatile;
|
|
|
|
|
|
|
|
Status = OemAgesaSaveS3Info (
|
|
|
|
S3DataType,
|
|
|
|
AmdS3SaveParamsPtr->S3DataBlock.VolatileStorageSize,
|
|
|
|
AmdS3SaveParamsPtr->S3DataBlock.VolatileStorage);
|
|
|
|
}
|
|
|
|
OemAgesaSaveMtrr();
|
|
|
|
|
|
|
|
AmdReleaseStruct (&AmdInterfaceParams);
|
|
|
|
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* #ifndef __PRE_RAM__ */
|
|
|
|
#endif /* CONFIG_HAVE_ACPI_RESUME */
|
|
|
|
|
|
|
|
AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus)
|
|
|
|
{
|
|
|
|
AGESA_STATUS Status;
|
|
|
|
EVENT_PARAMS AmdEventParams;
|
|
|
|
|
|
|
|
LibAmdMemFill (&AmdEventParams,
|
|
|
|
0,
|
|
|
|
sizeof (EVENT_PARAMS),
|
|
|
|
&(AmdEventParams.StdHeader));
|
|
|
|
|
|
|
|
AmdEventParams.StdHeader.AltImageBasePtr = 0;
|
|
|
|
AmdEventParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
|
|
|
|
AmdEventParams.StdHeader.Func = 0;
|
|
|
|
AmdEventParams.StdHeader.ImageBasePtr = 0;
|
|
|
|
AmdEventParams.StdHeader.HeapStatus = HeapStatus;
|
|
|
|
Status = AmdReadEventLog (&AmdEventParams);
|
|
|
|
while (AmdEventParams.EventClass != 0) {
|
|
|
|
printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n", (unsigned int)AmdEventParams.EventClass,(unsigned int)AmdEventParams.EventInfo);
|
|
|
|
printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n",(unsigned int)AmdEventParams.DataParam1, (unsigned int)AmdEventParams.DataParam2);
|
|
|
|
printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n",(unsigned int)AmdEventParams.DataParam3, (unsigned int)AmdEventParams.DataParam4);
|
|
|
|
Status = AmdReadEventLog (&AmdEventParams);
|
|
|
|
}
|
|
|
|
|
|
|
|
return Status;
|
|
|
|
}
|