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coreboot-kgpe-d16/payloads/libpayload/drivers/i8042/i8042.h

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payloads/libpayload/drivers/i8042: Add macros for i8042 commands This change adds macros for commands (written to 0x64) and keyboard commands (written to 0x60) for 8042 controller. BUG=b:110024487 Change-Id: I74b2388d048e35b5bdf5bd862d0975e88f1bd6af Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-29 18:24:54 +02:00
/*
* This file is part of the libpayload project.
*
src/*: normalize Google copyright headers As per internal discussion, there's no "ChromiumOS Authors" that's meaningful outside the Chromium OS project, so change everything to the contemporary "Google LLC." While at it, also ensure consistency in the LLC variants (exactly one trailing period). "Google Inc" does not need to be touched, so leave them alone. Change-Id: Ia0780e31cdab879d2aaef62a2f0403e3db0a4ac8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/28756 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>
2018-09-26 20:46:04 +02:00
* Copyright 2018 Google LLC
payloads/libpayload/drivers/i8042: Add macros for i8042 commands This change adds macros for commands (written to 0x64) and keyboard commands (written to 0x60) for 8042 controller. BUG=b:110024487 Change-Id: I74b2388d048e35b5bdf5bd862d0975e88f1bd6af Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-29 18:24:54 +02:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef __DRIVERS_I8042_I8042_H__
#define __DRIVERS_I8042_I8042_H__
/* Port 0x64 commands */
#define I8042_CMD_RD_CMD_BYTE 0x20
#define I8042_CMD_WR_CMD_BYTE 0x60
#define I8042_CMD_DIS_AUX 0xa7
#define I8042_CMD_EN_AUX 0xa8
#define I8042_CMD_AUX_TEST 0xa9
#define I8042_CMD_SELF_TEST 0xaa
#define I8042_SELF_TEST_RSP 0x55
#define I8042_CMD_KB_TEST 0xab
#define I8042_CMD_DIAG_DUMP 0xac
#define I8042_CMD_DIS_KB 0xad
#define I8042_CMD_EN_KB 0xae
#define I8042_CMD_RD_INPUT_PORT 0xc0
#define I8042_CMD_RD_OUTPUT_PORT 0xd0
#define I8042_CMD_WR_OUTPUT_PORT 0xd1
#define I8042_CMD_RD_TEST_INPUTS 0xe0
/* Port 0x60 keyboard commands */
#define I8042_KBCMD_SET_MODE_IND 0xed
#define I8042_MODE_CAPS_LOCK_ON (1 << 2)
#define I8042_MODE_CAPS_LOCK_OFF (0 << 2)
#define I8042_MODE_NUM_LOCK_ON (1 << 1)
#define I8042_MODE_NUM_LOCK_OFF (0 << 1)
#define I8042_MODE_SCROLL_LOCK_ON (1 << 0)
#define I8042_MODE_SCROLL_LOCK_OFF (0 << 0)
#define I8042_KBCMD_SET_SCANCODE 0xf0
#define I8042_SCANCODE_SET_1 (1)
#define I8042_SCANCODE_SET_2 (2)
#define I8042_SCANCODE_SET_3 (3)
#define I8042_KBCMD_SET_TYPEMATIC 0xf3
#define I8042_KBCMD_EN 0xf4
#define I8042_KBCMD_DEFAULT_DIS 0xf5
#define I8042_KBCMD_SET_DEFAULT 0xf6
libpayload: Reset PS/2 keyboard Loading a libpayload based payload like coreinfo or FILO from SeaBIOS or GRUB pressing keys does not give the expected results. For example, pressing F1 gives the character 24 translated to scan code 6a. ESC for example 43 (111) in coreinfo loaded from SeaBIOS on QEMU Q35. The problem is not reproducible using the payload directly, that means without SeaBIOS or GRUB. The problem seems to be, that those have already initialized the PS/2 controller and AT keyboard. Comparing it with coreboot’s PS/2 keyboard code, the keyboard needs to be reset. That seems to fix the issue, when the keyboard was initialized before. TEST=Build coreboot for QEMU Q35 with SeaBIOS, and coreinfo as secondary payload. Run qemu-system-i386 -M q35 -L /dev/shm -bios build/coreboot.rom -serial stdio press 3 to select the coreinfo payload, and verify that the keys F1 and F2 are working. Same with coreinfo loaded from GRUB on the ASRock E350M1. Change-Id: I2732292ac316d4bc0029ecb5c95fa7d1e7d68947 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-22 19:19:15 +02:00
#define I8042_KBCMD_ACK 0xfa
payloads/libpayload/drivers/i8042: Add macros for i8042 commands This change adds macros for commands (written to 0x64) and keyboard commands (written to 0x60) for 8042 controller. BUG=b:110024487 Change-Id: I74b2388d048e35b5bdf5bd862d0975e88f1bd6af Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-29 18:24:54 +02:00
#define I8042_KBCMD_RESEND 0xfe
#define I8042_KBCMD_RESET 0xff
#endif /* __DRIVERS_I8042_I8042_H__ */