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coreboot-kgpe-d16/src/arch/x86/acpi_device.c

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device: Add an ACPI device name and path concept to devices Add a function to "struct device_operations" to return the ACPI name for the device, and helper functions to find this name (either from the device or its parent) and to build a fully qualified ACPI path from the root device. This addition will allow device drivers to generate their ACPI AML in the SSDT at boot, with customization supplied by devicetree.cb, instead of needing custom DSDT ASL for every mainboard. The root device acpi_name is defined as "\\_SB" and is used to start the path when building a fully qualified name. This requires SOC support to provide handlers for returning the ACPI name for devices that it owns, and those names must match the objects declared in the DSDT. The handler can be done either in each device driver or with a global handler for the entire SOC. Simplified example of how this can be used for an i2c device declared in devicetree.cb with: chip soc/intel/skylake # "\_SB" (from root device) device domain 0 on # "PCI0" device pci 19.2 on # "I2C4" chip drivers/i2c/test0 device i2c 1a.0 on end # "TST0" end end end end And basic SSDT generating code in the device driver: acpigen_write_scope(acpi_device_scope(dev)); acpigen_write_device(acpi_device_name(dev)); acpigen_write_string("_HID", "TEST0000"); acpigen_write_byte("_UID", 0); acpigen_pop_len(); /* device */ acpigen_pop_len(); /* scope */ Will produce this ACPI code: Scope (\_SB.PCI0.I2C4) { Device (TST0) { Name (_HID, "TEST0000") Name (_UID, 0) } } Change-Id: Ie149595aeab96266fa5f006e7934339f0119ac54 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14840 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-09 03:15:25 +02:00
/*
* This file is part of the coreboot project.
*
* Copyright 2016 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <string.h>
#include <arch/acpi.h>
#include <arch/acpi_device.h>
#include <arch/acpigen.h>
#include <device/device.h>
acpi_device: Add support for writing ACPI I2C descriptors Add required definitions to describe an ACPI I2C bus and a method to write the I2cSerialBus() descriptor to the SSDT. This will be used by device drivers to describe their I2C resources to the OS. The devicetree i2c device can supply the address and 7 or 10 bit mode as well as indicate the GPIO controller device, and the bus speed can be fixed or configured by the driver. chip.h: struct drivers_i2c_generic_config { enum i2c_speed bus_speed; }; generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_i2c_generic_config *config = dev->chip_info; struct acpi_i2c i2c = { .address = dev->path->i2c.device, .mode_10bit = dev->path.i2c.mode_10bit, .speed = config->bus_speed ? : I2C_SPEED_FAST, .resource = acpi_device_path(dev->bus->dev) }; ... acpi_device_write_i2c(&i2c); ... } devicetree.cb: device pci 15.0 on chip drivers/i2c/generic device i2c 10.0 on end end end SSDT.dsl: I2cSerialBus (0x10, ControllerInitiated, 400000, AddressingMode7Bit, "\\_SB.PCI0.I2C0", 0, ResourceConsumer) Change-Id: I598401ac81a92c72f19da0271af1e218580a6c49 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14935 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 05:10:47 +02:00
#include <device/i2c.h>
device: Add an ACPI device name and path concept to devices Add a function to "struct device_operations" to return the ACPI name for the device, and helper functions to find this name (either from the device or its parent) and to build a fully qualified ACPI path from the root device. This addition will allow device drivers to generate their ACPI AML in the SSDT at boot, with customization supplied by devicetree.cb, instead of needing custom DSDT ASL for every mainboard. The root device acpi_name is defined as "\\_SB" and is used to start the path when building a fully qualified name. This requires SOC support to provide handlers for returning the ACPI name for devices that it owns, and those names must match the objects declared in the DSDT. The handler can be done either in each device driver or with a global handler for the entire SOC. Simplified example of how this can be used for an i2c device declared in devicetree.cb with: chip soc/intel/skylake # "\_SB" (from root device) device domain 0 on # "PCI0" device pci 19.2 on # "I2C4" chip drivers/i2c/test0 device i2c 1a.0 on end # "TST0" end end end end And basic SSDT generating code in the device driver: acpigen_write_scope(acpi_device_scope(dev)); acpigen_write_device(acpi_device_name(dev)); acpigen_write_string("_HID", "TEST0000"); acpigen_write_byte("_UID", 0); acpigen_pop_len(); /* device */ acpigen_pop_len(); /* scope */ Will produce this ACPI code: Scope (\_SB.PCI0.I2C4) { Device (TST0) { Name (_HID, "TEST0000") Name (_UID, 0) } } Change-Id: Ie149595aeab96266fa5f006e7934339f0119ac54 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14840 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-09 03:15:25 +02:00
#include <device/path.h>
acpi_device: Add support for writing ACPI GPIO descriptors Add definitions to describe GPIOs in generated ACPI objects and a method to write a GpioIo() or GpioInt() descriptor to the SSDT. ACPI GPIOs have many possible configuration options and a structure is created to describe it accurately in ACPI terms. There are many shared descriptor fields between GpioIo() and GpioInt() so the same function can write both types. GpioInt shares many properties with ACPI Interrupts and the same types are re-used here where possible. One addition is that GpioInt can be configured to trigger on both low and high edge transitions. One descriptor can describe multiple GPIO pins (limited to 8 in this implementation) that all share configuration and controller and are used by the same device scope. Accurately referring to the GPIO controller that this pin is connected to requires the SoC/board to implement a function handler for acpi_gpio_path(), or for the caller to provide this directly as a string in the acpi_gpio->reference variable. This will get used by device drivers to describe their resources in the SSDT. Here is a sample for a Maxim 98357A I2S codec which has a GPIO for power and channel selection called "sdmode". chip.h: struct drivers_generic_max98357a_config { struct acpi_gpio sdmode_gpio; }; max98357a.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_max98357a_config *config = dev->chip_info; ... acpi_device_write_gpio(&config->sdmode_gpio); ... } devicetree.cb: device pci 1f.3 on chip drivers/generic/max98357a register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_C5)" device generic 0 on end end end SSDT.dsl: GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, ,) { 53 } Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Ibf5bab9c4bf6f21252373fb013e78f872550b167 Reviewed-on: https://review.coreboot.org/14934 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 02:08:38 +02:00
#if IS_ENABLED(CONFIG_GENERIC_GPIO_LIB)
#include <gpio.h>
#endif
device: Add an ACPI device name and path concept to devices Add a function to "struct device_operations" to return the ACPI name for the device, and helper functions to find this name (either from the device or its parent) and to build a fully qualified ACPI path from the root device. This addition will allow device drivers to generate their ACPI AML in the SSDT at boot, with customization supplied by devicetree.cb, instead of needing custom DSDT ASL for every mainboard. The root device acpi_name is defined as "\\_SB" and is used to start the path when building a fully qualified name. This requires SOC support to provide handlers for returning the ACPI name for devices that it owns, and those names must match the objects declared in the DSDT. The handler can be done either in each device driver or with a global handler for the entire SOC. Simplified example of how this can be used for an i2c device declared in devicetree.cb with: chip soc/intel/skylake # "\_SB" (from root device) device domain 0 on # "PCI0" device pci 19.2 on # "I2C4" chip drivers/i2c/test0 device i2c 1a.0 on end # "TST0" end end end end And basic SSDT generating code in the device driver: acpigen_write_scope(acpi_device_scope(dev)); acpigen_write_device(acpi_device_name(dev)); acpigen_write_string("_HID", "TEST0000"); acpigen_write_byte("_UID", 0); acpigen_pop_len(); /* device */ acpigen_pop_len(); /* scope */ Will produce this ACPI code: Scope (\_SB.PCI0.I2C4) { Device (TST0) { Name (_HID, "TEST0000") Name (_UID, 0) } } Change-Id: Ie149595aeab96266fa5f006e7934339f0119ac54 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14840 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-09 03:15:25 +02:00
acpi_device: Add support for writing ACPI Interrupt descriptors Add definitions for ACPI device extended interrupts and a method to write an Interrupt() descriptor to the SSDT output stream. Interrupts are often tied together with other resources and some configuration items are shared (though not always compatibly) with other constructs like GPIOs and GPEs. These will get used by device drivers to write _CRS sections for devices into the SSDT. One usage is to include a "struct acpi_irq" inside a config struct for a device so it can be initialized based on settings in devicetree. Example usage: chip.h: struct drivers_i2c_generic_config { struct acpi_irq irq; }; generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_i2c_generic_config *config = dev->chip_info; ... acpi_device_write_interrupt(&config->irq); ... } devicetree.cb: device pci 15.0 on chip drivers/i2c/generic register "irq" = "IRQ_EDGE_LOW(GPP_E7_IRQ)" device i2c 10 on end end end SSDT.dsl: Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive,,,) { 31 } Change-Id: I3b64170cc2ebac178e7a17df479eda7670a42703 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14933 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 00:38:36 +02:00
/* Write empty word value and return pointer to it */
static void *acpi_device_write_zero_len(void)
{
char *p = acpigen_get_current();
acpigen_emit_word(0);
return p;
}
/* Fill in length value from start to current at specified location */
static void acpi_device_fill_from_len(char *ptr, char *start)
{
uint16_t len = acpigen_get_current() - start;
ptr[0] = len & 0xff;
ptr[1] = (len >> 8) & 0xff;
}
/*
* Fill in the length field with the value calculated from after
* the 16bit field to acpigen current as this length value does
* not include the length field itself.
*/
static void acpi_device_fill_len(void *ptr)
{
acpi_device_fill_from_len(ptr, ptr + sizeof(uint16_t));
}
device: Add an ACPI device name and path concept to devices Add a function to "struct device_operations" to return the ACPI name for the device, and helper functions to find this name (either from the device or its parent) and to build a fully qualified ACPI path from the root device. This addition will allow device drivers to generate their ACPI AML in the SSDT at boot, with customization supplied by devicetree.cb, instead of needing custom DSDT ASL for every mainboard. The root device acpi_name is defined as "\\_SB" and is used to start the path when building a fully qualified name. This requires SOC support to provide handlers for returning the ACPI name for devices that it owns, and those names must match the objects declared in the DSDT. The handler can be done either in each device driver or with a global handler for the entire SOC. Simplified example of how this can be used for an i2c device declared in devicetree.cb with: chip soc/intel/skylake # "\_SB" (from root device) device domain 0 on # "PCI0" device pci 19.2 on # "I2C4" chip drivers/i2c/test0 device i2c 1a.0 on end # "TST0" end end end end And basic SSDT generating code in the device driver: acpigen_write_scope(acpi_device_scope(dev)); acpigen_write_device(acpi_device_name(dev)); acpigen_write_string("_HID", "TEST0000"); acpigen_write_byte("_UID", 0); acpigen_pop_len(); /* device */ acpigen_pop_len(); /* scope */ Will produce this ACPI code: Scope (\_SB.PCI0.I2C4) { Device (TST0) { Name (_HID, "TEST0000") Name (_UID, 0) } } Change-Id: Ie149595aeab96266fa5f006e7934339f0119ac54 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14840 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-09 03:15:25 +02:00
/* Locate and return the ACPI name for this device */
const char *acpi_device_name(struct device *dev)
{
if (!dev)
return NULL;
/* Check for device specific handler */
if (dev->ops->acpi_name)
return dev->ops->acpi_name(dev);
/* Check parent device in case it has a global handler */
if (dev->bus && dev->bus->dev->ops->acpi_name)
return dev->bus->dev->ops->acpi_name(dev);
return NULL;
}
/* Recursive function to find the root device and print a path from there */
static size_t acpi_device_path_fill(struct device *dev, char *buf,
size_t buf_len, size_t cur)
{
const char *name = acpi_device_name(dev);
size_t next = 0;
/*
* Make sure this name segment will fit, including the path segment
* separator and possible NUL terminator if this is the last segment.
*/
if (!dev || !name || (cur + strlen(name) + 2) > buf_len)
return cur;
/* Walk up the tree to the root device */
if (dev->path.type != DEVICE_PATH_ROOT && dev->bus && dev->bus->dev)
next = acpi_device_path_fill(dev->bus->dev, buf, buf_len, cur);
/* Fill in the path from the root device */
next += snprintf(buf + next, buf_len - next, "%s%s",
dev->path.type == DEVICE_PATH_ROOT ? "" : ".", name);
return next;
}
/*
* Warning: just as with dev_path() this uses a static buffer
* so should not be called mulitple times in one statement
*/
const char *acpi_device_path(struct device *dev)
{
static char buf[DEVICE_PATH_MAX] = {};
if (!dev)
return NULL;
if (acpi_device_path_fill(dev, buf, sizeof(buf), 0) <= 0)
return NULL;
return buf;
}
/* Return the path of the parent device as the ACPI Scope for this device */
const char *acpi_device_scope(struct device *dev)
{
if (!dev || !dev->bus || !dev->bus->dev)
return NULL;
return acpi_device_path(dev->bus->dev);
}
/* Concatentate the device path and provided name suffix */
const char *acpi_device_path_join(struct device *dev, const char *name)
{
static char buf[DEVICE_PATH_MAX] = {};
size_t len;
if (!dev)
return NULL;
/* Build the path of this device */
len = acpi_device_path_fill(dev, buf, sizeof(buf), 0);
if (len <= 0)
return NULL;
/* Ensure there is room for the added name, separator, and NUL */
if ((len + strlen(name) + 2) > sizeof(buf))
return NULL;
snprintf(buf + len, sizeof(buf) - len, ".%s", name);
return buf;
}
acpi_device: Add support for writing ACPI Interrupt descriptors Add definitions for ACPI device extended interrupts and a method to write an Interrupt() descriptor to the SSDT output stream. Interrupts are often tied together with other resources and some configuration items are shared (though not always compatibly) with other constructs like GPIOs and GPEs. These will get used by device drivers to write _CRS sections for devices into the SSDT. One usage is to include a "struct acpi_irq" inside a config struct for a device so it can be initialized based on settings in devicetree. Example usage: chip.h: struct drivers_i2c_generic_config { struct acpi_irq irq; }; generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_i2c_generic_config *config = dev->chip_info; ... acpi_device_write_interrupt(&config->irq); ... } devicetree.cb: device pci 15.0 on chip drivers/i2c/generic register "irq" = "IRQ_EDGE_LOW(GPP_E7_IRQ)" device i2c 10 on end end end SSDT.dsl: Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive,,,) { 31 } Change-Id: I3b64170cc2ebac178e7a17df479eda7670a42703 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14933 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 00:38:36 +02:00
/* ACPI 6.1 section 6.4.3.6: Extended Interrupt Descriptor */
void acpi_device_write_interrupt(const struct acpi_irq *irq)
{
void *desc_length;
uint8_t flags;
if (!irq || !irq->pin)
return;
/* This is supported by GpioInt() but not Interrupt() */
if (irq->polarity == IRQ_ACTIVE_BOTH)
return;
/* Byte 0: Descriptor Type */
acpigen_emit_byte(ACPI_DESCRIPTOR_INTERRUPT);
/* Byte 1-2: Length (filled in later) */
desc_length = acpi_device_write_zero_len();
/*
* Byte 3: Flags
* [7:5]: Reserved
* [4]: Wake (0=NO_WAKE 1=WAKE)
* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
* [2]: Polarity (0=HIGH 1=LOW)
* [1]: Mode (0=LEVEL 1=EDGE)
* [0]: Resource (0=PRODUCER 1=CONSUMER)
*/
flags = 1 << 0; /* ResourceConsumer */
if (irq->mode == IRQ_EDGE_TRIGGERED)
flags |= 1 << 1;
if (irq->polarity == IRQ_ACTIVE_LOW)
flags |= 1 << 2;
if (irq->shared == IRQ_SHARED)
flags |= 1 << 3;
if (irq->wake == IRQ_WAKE)
flags |= 1 << 4;
acpigen_emit_byte(flags);
/* Byte 4: Interrupt Table Entry Count */
acpigen_emit_byte(1);
/* Byte 5-8: Interrupt Number */
acpigen_emit_dword(irq->pin);
/* Fill in Descriptor Length (account for len word) */
acpi_device_fill_len(desc_length);
}
acpi_device: Add support for writing ACPI GPIO descriptors Add definitions to describe GPIOs in generated ACPI objects and a method to write a GpioIo() or GpioInt() descriptor to the SSDT. ACPI GPIOs have many possible configuration options and a structure is created to describe it accurately in ACPI terms. There are many shared descriptor fields between GpioIo() and GpioInt() so the same function can write both types. GpioInt shares many properties with ACPI Interrupts and the same types are re-used here where possible. One addition is that GpioInt can be configured to trigger on both low and high edge transitions. One descriptor can describe multiple GPIO pins (limited to 8 in this implementation) that all share configuration and controller and are used by the same device scope. Accurately referring to the GPIO controller that this pin is connected to requires the SoC/board to implement a function handler for acpi_gpio_path(), or for the caller to provide this directly as a string in the acpi_gpio->reference variable. This will get used by device drivers to describe their resources in the SSDT. Here is a sample for a Maxim 98357A I2S codec which has a GPIO for power and channel selection called "sdmode". chip.h: struct drivers_generic_max98357a_config { struct acpi_gpio sdmode_gpio; }; max98357a.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_max98357a_config *config = dev->chip_info; ... acpi_device_write_gpio(&config->sdmode_gpio); ... } devicetree.cb: device pci 1f.3 on chip drivers/generic/max98357a register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_C5)" device generic 0 on end end end SSDT.dsl: GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, ,) { 53 } Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Ibf5bab9c4bf6f21252373fb013e78f872550b167 Reviewed-on: https://review.coreboot.org/14934 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 02:08:38 +02:00
/* ACPI 6.1 section 6.4.3.8.1 - GPIO Interrupt or I/O */
void acpi_device_write_gpio(const struct acpi_gpio *gpio)
{
void *start, *desc_length;
void *pin_table_offset, *vendor_data_offset, *resource_offset;
uint16_t flags = 0;
int pin;
if (!gpio || gpio->type > ACPI_GPIO_TYPE_IO)
return;
start = acpigen_get_current();
/* Byte 0: Descriptor Type */
acpigen_emit_byte(ACPI_DESCRIPTOR_GPIO);
/* Byte 1-2: Length (fill in later) */
desc_length = acpi_device_write_zero_len();
/* Byte 3: Revision ID */
acpigen_emit_byte(ACPI_GPIO_REVISION_ID);
/* Byte 4: GpioIo or GpioInt */
acpigen_emit_byte(gpio->type);
/*
* Byte 5-6: General Flags
* [15:1]: 0 => Reserved
* [0]: 1 => ResourceConsumer
*/
acpigen_emit_word(1 << 0);
switch (gpio->type) {
case ACPI_GPIO_TYPE_INTERRUPT:
/*
* Byte 7-8: GPIO Interrupt Flags
* [15:5]: 0 => Reserved
* [4]: Wake (0=NO_WAKE 1=WAKE)
* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
* [2:1]: Polarity (0=HIGH 1=LOW 2=BOTH)
* [0]: Mode (0=LEVEL 1=EDGE)
*/
if (gpio->irq.mode == IRQ_EDGE_TRIGGERED)
flags |= 1 << 0;
if (gpio->irq.shared == IRQ_SHARED)
flags |= 1 << 3;
if (gpio->irq.wake == IRQ_WAKE)
flags |= 1 << 4;
switch (gpio->irq.polarity) {
case IRQ_ACTIVE_HIGH:
flags |= 0 << 1;
break;
case IRQ_ACTIVE_LOW:
flags |= 1 << 1;
break;
case IRQ_ACTIVE_BOTH:
flags |= 2 << 1;
break;
}
break;
case ACPI_GPIO_TYPE_IO:
/*
* Byte 7-8: GPIO IO Flags
* [15:4]: 0 => Reserved
* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
* [2]: 0 => Reserved
* [1:0]: IO Restriction
* 0 => IoRestrictionNone
* 1 => IoRestrictionInputOnly
* 2 => IoRestrictionOutputOnly
* 3 => IoRestrictionNoneAndPreserve
*/
flags |= gpio->io_restrict & 3;
if (gpio->io_shared)
flags |= 1 << 3;
break;
}
acpigen_emit_word(flags);
/*
* Byte 9: Pin Configuration
* 0x01 => Default (no configuration applied)
* 0x02 => Pull-up
* 0x03 => Pull-down
* 0x04-0x7F => Reserved
* 0x80-0xff => Vendor defined
*/
acpigen_emit_byte(gpio->pull);
/* Byte 10-11: Output Drive Strength in 1/100 mA */
acpigen_emit_word(gpio->output_drive_strength);
/* Byte 12-13: Debounce Timeout in 1/100 ms */
acpigen_emit_word(gpio->interrupt_debounce_timeout);
/* Byte 14-15: Pin Table Offset, relative to start */
pin_table_offset = acpi_device_write_zero_len();
/* Byte 16: Reserved */
acpigen_emit_byte(0);
/* Byte 17-18: Resource Source Name Offset, relative to start */
resource_offset = acpi_device_write_zero_len();
/* Byte 19-20: Vendor Data Offset, relative to start */
vendor_data_offset = acpi_device_write_zero_len();
/* Byte 21-22: Vendor Data Length */
acpigen_emit_word(0);
/* Fill in Pin Table Offset */
acpi_device_fill_from_len(pin_table_offset, start);
/* Pin Table, one word for each pin */
for (pin = 0; pin < gpio->pin_count; pin++)
acpigen_emit_word(gpio->pins[pin]);
/* Fill in Resource Source Name Offset */
acpi_device_fill_from_len(resource_offset, start);
/* Resource Source Name String */
#if IS_ENABLED(CONFIG_GENERIC_GPIO_LIB)
acpigen_emit_string(gpio->resource ? : gpio_acpi_path(gpio->pins[0]));
#else
acpigen_emit_string(gpio->resource);
#endif
/* Fill in Vendor Data Offset */
acpi_device_fill_from_len(vendor_data_offset, start);
/* Fill in GPIO Descriptor Length (account for len word) */
acpi_device_fill_len(desc_length);
}
acpi_device: Add support for writing ACPI I2C descriptors Add required definitions to describe an ACPI I2C bus and a method to write the I2cSerialBus() descriptor to the SSDT. This will be used by device drivers to describe their I2C resources to the OS. The devicetree i2c device can supply the address and 7 or 10 bit mode as well as indicate the GPIO controller device, and the bus speed can be fixed or configured by the driver. chip.h: struct drivers_i2c_generic_config { enum i2c_speed bus_speed; }; generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_i2c_generic_config *config = dev->chip_info; struct acpi_i2c i2c = { .address = dev->path->i2c.device, .mode_10bit = dev->path.i2c.mode_10bit, .speed = config->bus_speed ? : I2C_SPEED_FAST, .resource = acpi_device_path(dev->bus->dev) }; ... acpi_device_write_i2c(&i2c); ... } devicetree.cb: device pci 15.0 on chip drivers/i2c/generic device i2c 10.0 on end end end SSDT.dsl: I2cSerialBus (0x10, ControllerInitiated, 400000, AddressingMode7Bit, "\\_SB.PCI0.I2C0", 0, ResourceConsumer) Change-Id: I598401ac81a92c72f19da0271af1e218580a6c49 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14935 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 05:10:47 +02:00
/* ACPI 6.1 section 6.4.3.8.2.1 - I2cSerialBus() */
void acpi_device_write_i2c(const struct acpi_i2c *i2c)
{
void *desc_length, *type_length;
/* Byte 0: Descriptor Type */
acpigen_emit_byte(ACPI_DESCRIPTOR_SERIAL_BUS);
/* Byte 1+2: Length (filled in later) */
desc_length = acpi_device_write_zero_len();
/* Byte 3: Revision ID */
acpigen_emit_byte(ACPI_SERIAL_BUS_REVISION_ID);
/* Byte 4: Resource Source Index is Reserved */
acpigen_emit_byte(0);
/* Byte 5: Serial Bus Type is I2C */
acpigen_emit_byte(ACPI_SERIAL_BUS_TYPE_I2C);
/*
* Byte 6: Flags
* [7:2]: 0 => Reserved
* [1]: 1 => ResourceConsumer
* [0]: 0 => ControllerInitiated
*/
acpigen_emit_byte(1 << 1);
/*
* Byte 7-8: Type Specific Flags
* [15:1]: 0 => Reserved
* [0]: 0 => 7bit, 1 => 10bit
*/
acpigen_emit_word(i2c->mode_10bit);
/* Byte 9: Type Specific Revision ID */
acpigen_emit_byte(ACPI_SERIAL_BUS_REVISION_ID);
/* Byte 10-11: I2C Type Data Length */
type_length = acpi_device_write_zero_len();
/* Byte 12-15: I2C Bus Speed */
acpigen_emit_dword(i2c->speed);
/* Byte 16-17: I2C Slave Address */
acpigen_emit_word(i2c->address);
/* Fill in Type Data Length */
acpi_device_fill_len(type_length);
/* Byte 18+: ResourceSource */
acpigen_emit_string(i2c->resource);
/* Fill in I2C Descriptor Length */
acpi_device_fill_len(desc_length);
}
acpi_device: Add support for writing ACPI SPI descriptors Add required definitions to describe an ACPI SPI bus and a method to write the SpiSerialBus() descriptor to the SSDT. This will be used by device drivers to describe their SPI resources to the OS. SPI devices are not currently enumerated in the devicetree but can be enumerated by device drivers directly. generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct acpi_spi spi = { .device_select = dev->path->generic.device.id, .device_select_polarity = SPI_POLARITY_LOW, .spi_wire_mode = SPI_4_WIRE_MODE, .speed = 1000 * 1000; /* 1 mHz */ .data_bit_length = 8, .clock_phase = SPI_CLOCK_PHASE_FIRST, .clock_polarity = SPI_POLARITY_LOW, .resource = acpi_device_path(dev->bus->dev) }; ... acpi_device_write_spi(&spi); ... } devicetree.cb: device pci 1e.2 on chip drivers/spi/generic device generic 0 on end end end SSDT.dsl: SpiSerialBus (0, PolarityLow, FourWireMode, 8, ControllerInitiated, 1000000, ClockPolarityLow, ClockPhaseFirst, "\\_SB.PCI0.SPI0", 0, ResourceConsumer) Change-Id: I0ef83dc111ac6c19d68872ab64e1e5e3a7756cae Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14936 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 16:26:34 +02:00
/* ACPI 6.1 section 6.4.3.8.2.2 - SpiSerialBus() */
void acpi_device_write_spi(const struct acpi_spi *spi)
{
void *desc_length, *type_length;
uint16_t flags = 0;
/* Byte 0: Descriptor Type */
acpigen_emit_byte(ACPI_DESCRIPTOR_SERIAL_BUS);
/* Byte 1+2: Length (filled in later) */
desc_length = acpi_device_write_zero_len();
/* Byte 3: Revision ID */
acpigen_emit_byte(ACPI_SERIAL_BUS_REVISION_ID);
/* Byte 4: Resource Source Index is Reserved */
acpigen_emit_byte(0);
/* Byte 5: Serial Bus Type is SPI */
acpigen_emit_byte(ACPI_SERIAL_BUS_TYPE_SPI);
/*
* Byte 6: Flags
* [7:2]: 0 => Reserved
* [1]: 1 => ResourceConsumer
* [0]: 0 => ControllerInitiated
*/
acpigen_emit_byte(1 << 1);
/*
* Byte 7-8: Type Specific Flags
* [15:2]: 0 => Reserved
* [1]: 0 => ActiveLow, 1 => ActiveHigh
* [0]: 0 => FourWire, 1 => ThreeWire
*/
if (spi->wire_mode == SPI_3_WIRE_MODE)
flags |= 1 << 0;
if (spi->device_select_polarity == SPI_POLARITY_HIGH)
flags |= 1 << 1;
acpigen_emit_word(flags);
/* Byte 9: Type Specific Revision ID */
acpigen_emit_byte(ACPI_SERIAL_BUS_REVISION_ID);
/* Byte 10-11: SPI Type Data Length */
type_length = acpi_device_write_zero_len();
/* Byte 12-15: Connection Speed */
acpigen_emit_dword(spi->speed);
/* Byte 16: Data Bit Length */
acpigen_emit_byte(spi->data_bit_length);
/* Byte 17: Clock Phase */
acpigen_emit_byte(spi->clock_phase);
/* Byte 18: Clock Polarity */
acpigen_emit_byte(spi->clock_polarity);
/* Byte 19-20: Device Selection */
acpigen_emit_word(spi->device_select);
/* Fill in Type Data Length */
acpi_device_fill_len(type_length);
/* Byte 21+: ResourceSource String */
acpigen_emit_string(spi->resource);
/* Fill in SPI Descriptor Length */
acpi_device_fill_len(desc_length);
}
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