coreboot-kgpe-d16/util/flashrom/jedec.c

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/*
* This file is part of the flashrom project.
*
* Copyright (C) 2000 Silicon Integrated System Corporation
* Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdio.h>
#include <stdint.h>
#include "flash.h"
#define MAX_REFLASH_TRIES 0x10
void toggle_ready_jedec(volatile uint8_t *dst)
{
unsigned int i = 0;
uint8_t tmp1, tmp2;
tmp1 = *dst & 0x40;
while (i++ < 0xFFFFFFF) {
tmp2 = *dst & 0x40;
if (tmp1 == tmp2) {
break;
}
tmp1 = tmp2;
}
}
void data_polling_jedec(volatile uint8_t *dst, uint8_t data)
{
unsigned int i = 0;
uint8_t tmp;
data &= 0x80;
while (i++ < 0xFFFFFFF) {
tmp = *dst & 0x80;
if (tmp == data) {
break;
}
}
}
void unprotect_jedec(volatile uint8_t *bios)
{
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0x80;
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0x20;
usleep(200);
}
void protect_jedec(volatile uint8_t *bios)
{
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0xA0;
usleep(200);
}
int probe_jedec(struct flashchip *flash)
{
volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2;
/* Issue JEDEC Product ID Entry command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x90;
myusec_delay(10);
/* Read product ID */
id1 = *(volatile uint8_t *)bios;
id2 = *(volatile uint8_t *)(bios + 0x01);
/* Issue JEDEC Product ID Exit command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0xF0;
myusec_delay(10);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
if (id1 == flash->manufacture_id && id2 == flash->model_id)
return 1;
return 0;
}
int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
{
/* Issue the Sector Erase command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + page) = 0x30;
myusec_delay(10);
/* wait for Toggle bit ready */
toggle_ready_jedec(bios);
return 0;
}
int erase_block_jedec(volatile uint8_t *bios, unsigned int block)
{
/* Issue the Sector Erase command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + block) = 0x50;
myusec_delay(10);
/* wait for Toggle bit ready */
toggle_ready_jedec(bios);
return 0;
}
int erase_chip_jedec(struct flashchip *flash)
{
volatile uint8_t *bios = flash->virtual_memory;
/* Issue the JEDEC Chip Erase command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x10;
myusec_delay(10);
toggle_ready_jedec(bios);
return 0;
}
int write_page_write_jedec(volatile uint8_t *bios, uint8_t *src,
volatile uint8_t *dst, int page_size)
{
int i, tried = 0, start_index = 0, ok;
volatile uint8_t *d = dst;
uint8_t *s = src;
retry:
/* Issue JEDEC Data Unprotect comand */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0xA0;
/* transfer data from source to destination */
for (i = start_index; i < page_size; i++) {
/* If the data is 0xFF, don't program it */
if (*src != 0xFF)
*dst = *src;
dst++;
src++;
}
toggle_ready_jedec(dst - 1);
dst = d;
src = s;
ok = 1;
for (i = 0; i < page_size; i++) {
if (*dst != *src) {
ok = 0;
break;
}
dst++;
src++;
}
if (!ok && tried++ < MAX_REFLASH_TRIES) {
start_index = i;
goto retry;
}
if (!ok) {
fprintf(stderr, " page %d failed!\n",
(unsigned int)(d - bios) / page_size);
}
return !ok;
}
int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
volatile uint8_t *dst)
{
int tried = 0, ok = 1;
/* If the data is 0xFF, don't program it */
if (*src == 0xFF) {
return -1;
}
retry:
/* Issue JEDEC Byte Program command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0xA0;
/* transfer data from source to destination */
*dst = *src;
toggle_ready_jedec(bios);
if (*dst != *src && tried++ < MAX_REFLASH_TRIES) {
goto retry;
}
if (tried >= MAX_REFLASH_TRIES)
ok = 0;
return !ok;
}
int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
volatile uint8_t *dst, unsigned int page_size)
{
int i;
for (i = 0; i < page_size; i++) {
write_byte_program_jedec(bios, src, dst);
dst++, src++;
}
return 0;
}
int write_jedec(struct flashchip *flash, uint8_t *buf)
{
int i;
int total_size = flash->total_size * 1024;
int page_size = flash->page_size;
volatile uint8_t *bios = flash->virtual_memory;
erase_chip_jedec(flash);
// dumb check if erase was successful.
for (i = 0; i < total_size; i++) {
if (bios[i] != (uint8_t) 0xff) {
Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC day :-) Also minor changes to remove tab-space combinations where possible. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Index: jedec.c =================================================================== --- jedec.c (revision 2847) +++ jedec.c (working copy) @@ -281,7 +281,7 @@ // dumb check if erase was successful. for (i = 0; i < total_size; i++) { if (bios[i] != (uint8_t) 0xff) { - printf("ERASE FAILED\n"); + printf("ERASE FAILED @%d, val %02x\n", i, bios[i]); return -1; } } Index: board_enable.c =================================================================== --- board_enable.c (revision 2847) +++ board_enable.c (working copy) @@ -153,7 +153,8 @@ return 1; } /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: - We can't use writecnt directly, but have to use a strange encoding */ + * We can't use writecnt directly, but have to use a strange encoding + */ outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); do { busy = inb(port) & 0x80; @@ -202,43 +203,39 @@ /* * Helper functions for many Winbond Super I/Os of the W836xx range. */ -#define W836_INDEX 0x2E -#define W836_DATA 0x2F - /* Enter extended functions */ -static void w836xx_ext_enter(void) +static void w836xx_ext_enter(uint16_t port) { - outb(0x87, W836_INDEX); - outb(0x87, W836_INDEX); + outb(0x87, port); + outb(0x87, port); } /* Leave extended functions */ -static void w836xx_ext_leave(void) +static void w836xx_ext_leave(uint16_t port) { - outb(0xAA, W836_INDEX); + outb(0xAA, port); } /* General functions for reading/writing Winbond Super I/Os. */ -static unsigned char wbsio_read(unsigned char index) +static unsigned char wbsio_read(uint16_t index, uint8_t reg) { - outb(index, W836_INDEX); - return inb(W836_DATA); + outb(reg, index); + return inb(index+1); } -static void wbsio_write(unsigned char index, unsigned char data) +static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data) { - outb(index, W836_INDEX); - outb(data, W836_DATA); + outb(reg, index); + outb(data, index+1); } -static void wbsio_mask(unsigned char index, unsigned char data, - unsigned char mask) +static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask) { - unsigned char tmp; + uint8_t tmp; - outb(index, W836_INDEX); - tmp = inb(W836_DATA) & ~mask; - outb(tmp | (data & mask), W836_DATA); + outb(reg, index); + tmp = inb(index+1) & ~mask; + outb(tmp | (data & mask), index+1); } /** @@ -248,37 +245,80 @@ * - Agami Aruma * - IWILL DK8-HTX */ -static int w83627hf_gpio24_raise(const char *name) +static int w83627hf_gpio24_raise(uint16_t index, const char *name) { - w836xx_ext_enter(); + w836xx_ext_enter(index); /* Is this the w83627hf? */ - if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */ + if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */ fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", - name, wbsio_read(0x20)); - w836xx_ext_leave(); + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); return -1; } /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - wbsio_mask(0x2B, 0x10, 0x10); + wbsio_mask(index, 0x2B, 0x10, 0x10); - wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */ + wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */ - wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */ + wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */ - wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */ + wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ + wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */ + wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ - w836xx_ext_leave(); + w836xx_ext_leave(index); return 0; } +static int w83627hf_gpio24_raise_2e(const char *name) +{ + return w83627hf_gpio24_raise(0x2d, name); +} + /** + * Winbond W83627THF: GPIO 4, bit 4 + * + * Suited for: + * - MSI K8N-NEO3 + */ +static int w83627thf_gpio4_4_raise(uint16_t index, const char *name) +{ + w836xx_ext_enter(index); + /* Is this the w83627thf? */ + if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */ + fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); + return -1; + } + + /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ + + wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */ + + wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */ + + wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ + + wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ + + wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ + + w836xx_ext_leave(index); + + return 0; +} + +static int w83627thf_gpio4_4_raise_4e(const char *name) +{ + return w83627thf_gpio4_4_raise(0x4E, name); +} +/** * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. * * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there. @@ -335,12 +375,12 @@ pci_write_byte(dev, 0x59, val); /* Raise ROM MEMW# line on Winbond w83697 SuperIO */ - w836xx_ext_enter(); + w836xx_ext_enter(0x2E); - if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */ - wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */ + if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */ + wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */ - w836xx_ext_leave(); + w836xx_ext_leave(0x2E); return 0; } @@ -487,9 +527,11 @@ {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash}, {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise}, + "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise}, + "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, @@ -509,8 +551,8 @@ * Match boards on LinuxBIOS table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, - char *part) +static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, + char *part) { struct board_pciid_enable *board = board_pciid_enables; @@ -525,10 +567,11 @@ continue; if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + !pci_dev_find(board->second_vendor, board->second_device)) continue; return board; } + printf("NOT FOUND %s:%s\n", vendor, part); return NULL; } @@ -545,20 +588,20 @@ continue; if (!pci_card_find(board->first_vendor, board->first_device, - board->first_card_vendor, - board->first_card_device)) + board->first_card_vendor, + board->first_card_device)) continue; if (board->second_vendor) { if (board->second_card_vendor) { if (!pci_card_find(board->second_vendor, - board->second_device, - board->second_card_vendor, - board->second_card_device)) + board->second_device, + board->second_card_vendor, + board->second_card_device)) continue; } else { if (!pci_dev_find(board->second_vendor, - board->second_device)) + board->second_device)) continue; } } @@ -582,7 +625,7 @@ if (board) { printf("Found board \"%s\": Enabling flash write... ", - board->name); + board->name); ret = board->enable(board->name); if (ret) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-12 23:22:40 +02:00
printf("ERASE FAILED @%d, val %02x\n", i, bios[i]);
return -1;
}
}
printf("Programming Page: ");
for (i = 0; i < total_size / page_size; i++) {
printf("%04d at address: 0x%08x", i, i * page_size);
write_page_write_jedec(bios, buf + i * page_size,
bios + i * page_size, page_size);
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
printf("\n");
protect_jedec(bios);
return 0;
}