2019-05-28 11:29:29 +02:00
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# SuperIO SSTD generator
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This page describes the common SSDT ACPI generator for SuperIO chips that can
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be found in coreboot.
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## Functional description
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In order to automatically generate ACPI functions you need to add
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a new `chip superio/common` and `device pnp xx.0 on` to your devicetree.
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The xx denotes the hexadecimal address of the SuperIO.
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Place the regular LDN pnp devices behind those two entries.
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The code will automatically guess the function based on the decoded
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I/O range and ISA IRQ number.
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## Example devicetree.cb
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This example is based on AST2400.
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2019-10-05 21:03:04 +02:00
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```
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2019-05-28 11:29:29 +02:00
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# Add a "container" for proper ACPI code generation
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chip superio/common
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device pnp 2e.0 on # just for the base device, not for the LDNs
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chip superio/aspeed/ast2400
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device pnp 2e.0 off end
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device pnp 2e.2 on # SUART1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # SUART2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.4 on # SWC
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io 0x60 = 0xa00
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io 0x62 = 0xa10
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io 0x64 = 0xa20
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io 0x66 = 0xa30
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irq 0x70 = 0
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end
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end
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end
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end
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```
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## TODO
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1) Add ACPI HIDs to every SuperIO driver
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2) Don't guess ACPI HID of LDNs if it's known
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3) Add "enter config" and "exit config" bytes
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4) Generate support methods that allow
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* Setting resource settings at runtime
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* Getting resource settings at runtime
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* Disabling LDNs at runtime
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