2020-04-02 23:48:27 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2012-12-27 23:15:51 +01:00
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2013-04-05 22:42:39 +02:00
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#ifndef _DEVICE_I2C_H_
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#define _DEVICE_I2C_H_
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2012-12-27 23:15:51 +01:00
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2013-06-30 12:47:33 +02:00
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#include <stdint.h>
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i2c: Move to Linux like `struct i2c_msg`
Our current struct for I2C segments `i2c_seg` was close to being compa-
tible to the Linux version `i2c_msg`, close to being compatible to SMBus
and close to being readable (e.g. what was `chip` supposed to mean?) but
turned out to be hard to fix.
Instead of extending it in a backwards compatible way (and not touching
current controller drivers), replace it with a Linux source compatible
`struct i2c_msg` and patch all the drivers and users with Coccinelle.
The new `struct i2c_msg` should ease porting drivers from Linux and help
to write SMBus compatible controller drivers.
Beside integer type changes, the field `read` is replaced with a generic
field `flags` and `chip` is renamed to `slave`.
Patched with Coccinelle using the clumsy spatch below and some manual
changes:
* Nested struct initializers and one field access skipped by Coccinelle.
* Removed assumption in the code that I2C_M_RD is 1.
* In `i2c.h`, changed all occurences of `chip` to `slave`.
@@ @@
-struct i2c_seg
+struct i2c_msg
@@ identifier msg; expression e; @@
(
struct i2c_msg msg = {
- .read = 0,
+ .flags = 0,
};
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struct i2c_msg msg = {
- .read = 1,
+ .flags = I2C_M_RD,
};
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struct i2c_msg msg = {
- .chip = e,
+ .slave = e,
};
)
@@ struct i2c_msg msg; statement S1, S2; @@
(
-if (msg.read)
+if (msg.flags & I2C_M_RD)
S1 else S2
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-if (msg.read)
+if (msg.flags & I2C_M_RD)
S1
)
@@ struct i2c_msg *msg; statement S1, S2; @@
(
-if (msg->read)
+if (msg->flags & I2C_M_RD)
S1 else S2
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-if (msg->read)
+if (msg->flags & I2C_M_RD)
S1
)
@@ struct i2c_msg msg; expression e; @@
(
-msg.read = 0;
+msg.flags = 0;
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-msg.read = 1;
+msg.flags = I2C_M_RD;
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-msg.read = e;
+msg.flags = e ? I2C_M_RD : 0;
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-!!(msg.read)
+(msg.flags & I2C_M_RD)
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-(msg.read)
+(msg.flags & I2C_M_RD)
)
@@ struct i2c_msg *msg; expression e; @@
(
-msg->read = 0;
+msg->flags = 0;
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-msg->read = 1;
+msg->flags = I2C_M_RD;
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-msg->read = e;
+msg->flags = e ? I2C_M_RD : 0;
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-!!(msg->read)
+(msg->flags & I2C_M_RD)
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-(msg->read)
+(msg->flags & I2C_M_RD)
)
@@ struct i2c_msg msg; @@
-msg.chip
+msg.slave
@@ struct i2c_msg *msg; expression e; @@
-msg[e].chip
+msg[e].slave
@ slave disable ptr_to_array @ struct i2c_msg *msg; @@
-msg->chip
+msg->slave
Change-Id: Ifd7cabf0a18ffd7a1def25d1d7059b713d0b7ea9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-12 17:59:16 +02:00
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/**
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* struct i2c_msg - an I2C transaction segment beginning with START
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* @addr: Slave address, either seven or ten bits. When this is a ten
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* bit address, I2C_M_TEN must be set in @flags.
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* @flags: I2C_M_RD is handled by all adapters.
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* @len: Number of data bytes in @buf being read from or written to the
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* I2C slave address. For read transactions where I2C_M_RECV_LEN
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* is set, the caller guarantees that this buffer can hold up to
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* 32 bytes in addition to the initial length byte sent by the
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* slave (plus, if used, the SMBus PEC).
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* @buf: The buffer into which data is read, or from which it's written.
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*
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* An i2c_msg is the low level representation of one segment of an I2C
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* transaction. It is visible to drivers in the @i2c_transfer() procedure.
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*
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* All I2C adapters implement the standard rules for I2C transactions. Each
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* transaction begins with a START. That is followed by the slave address,
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* and a bit encoding read versus write. Then follow all the data bytes,
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* possibly including a byte with SMBus PEC. The transfer terminates with
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* a NAK, or when all those bytes have been transferred and ACKed. If this
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* is the last message in a group, it is followed by a STOP. Otherwise it
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* is followed by the next @i2c_msg transaction segment, beginning with a
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* (repeated) START.
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*/
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struct i2c_msg {
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uint16_t flags;
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#define I2C_M_RD 0x0001 /* read data, from slave to master */
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#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
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#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */
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#define I2C_M_NOSTART 0x4000 /* don't send a repeated START */
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uint16_t slave; /* slave address */
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uint16_t len; /* msg length */
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uint8_t *buf; /* pointer to msg data */
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};
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acpi_device: Add support for writing ACPI I2C descriptors
Add required definitions to describe an ACPI I2C bus and a method to
write the I2cSerialBus() descriptor to the SSDT.
This will be used by device drivers to describe their I2C resources to
the OS. The devicetree i2c device can supply the address and 7 or 10
bit mode as well as indicate the GPIO controller device, and the bus
speed can be fixed or configured by the driver.
chip.h:
struct drivers_i2c_generic_config {
enum i2c_speed bus_speed;
};
generic.c:
void acpi_fill_ssdt_generator(struct device *dev) {
struct drivers_i2c_generic_config *config = dev->chip_info;
struct acpi_i2c i2c = {
.address = dev->path->i2c.device,
.mode_10bit = dev->path.i2c.mode_10bit,
.speed = config->bus_speed ? : I2C_SPEED_FAST,
.resource = acpi_device_path(dev->bus->dev)
};
...
acpi_device_write_i2c(&i2c);
...
}
devicetree.cb:
device pci 15.0 on
chip drivers/i2c/generic
device i2c 10.0 on end
end
end
SSDT.dsl:
I2cSerialBus (0x10, ControllerInitiated, 400000, AddressingMode7Bit,
"\\_SB.PCI0.I2C0", 0, ResourceConsumer)
Change-Id: I598401ac81a92c72f19da0271af1e218580a6c49
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14935
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-10 05:10:47 +02:00
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enum i2c_speed {
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I2C_SPEED_STANDARD = 100000,
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I2C_SPEED_FAST = 400000,
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I2C_SPEED_FAST_PLUS = 1000000,
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I2C_SPEED_HIGH = 3400000,
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I2C_SPEED_FAST_ULTRA = 5000000,
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};
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enum i2c_address_mode {
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I2C_MODE_7_BIT,
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I2C_MODE_10_BIT
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};
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2013-04-05 22:42:39 +02:00
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#endif /* _DEVICE_I2C_H_ */
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