2012-04-04 00:07:22 +02:00
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/*
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* This file is part of the coreboot project.
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*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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2019-09-21 17:35:37 +02:00
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#include <device/pci_def.h>
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2019-03-01 12:43:02 +01:00
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#include <device/pci_ops.h>
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2012-04-04 00:07:22 +02:00
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#include <device/pci_ids.h>
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#include "pch.h"
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static void pci_init(struct device *dev)
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{
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u16 reg16;
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u8 reg8;
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printk(BIOS_DEBUG, "PCI init.\n");
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/* Enable Bus Master */
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reg16 = pci_read_config16(dev, PCI_COMMAND);
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reg16 |= PCI_COMMAND_MASTER;
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pci_write_config16(dev, PCI_COMMAND, reg16);
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/* This device has no interrupt */
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pci_write_config8(dev, INTR, 0xff);
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/* disable parity error response and SERR */
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2019-09-21 17:35:37 +02:00
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reg16 = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
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reg16 &= ~PCI_BRIDGE_CTL_PARITY;
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reg16 &= ~PCI_BRIDGE_CTL_SERR;
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pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16);
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2012-04-04 00:07:22 +02:00
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/* Master Latency Count must be set to 0x04! */
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reg8 = pci_read_config8(dev, SMLT);
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reg8 &= 0x07;
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reg8 |= (0x04 << 3);
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pci_write_config8(dev, SMLT, reg8);
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/* Clear errors in status registers */
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reg16 = pci_read_config16(dev, PSTS);
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//reg16 |= 0xf900;
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pci_write_config16(dev, PSTS, reg16);
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reg16 = pci_read_config16(dev, SECSTS);
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// reg16 |= 0xf900;
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pci_write_config16(dev, SECSTS, reg16);
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}
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static struct pci_operations pci_ops = {
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2019-03-20 16:55:27 +01:00
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.set_subsystem = pci_dev_set_subsystem,
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2012-04-04 00:07:22 +02:00
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};
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static struct device_operations device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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2019-09-23 09:01:16 +02:00
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.enable_resources = pci_bus_enable_resources,
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2012-04-04 00:07:22 +02:00
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.init = pci_init,
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.scan_bus = pci_scan_bridge,
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.ops_pci = &pci_ops,
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};
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static const struct pci_driver pch_pci __pci_driver = {
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.ops = &device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x2448,
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};
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