183 lines
6.9 KiB
Markdown
183 lines
6.9 KiB
Markdown
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Announcing coreboot 4.2
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=======================
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Halloween 2015 release - just as scary as that sounds
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Dear coreboot community,
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today marks the release of coreboot 4.2, the second release on our time
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based release schedule. Since 4.1 there were 936 commits by 90 authors,
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increasing the code base by approximately 17000 lines of code. We saw 35
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new contributors - welcome to coreboot! More than 34 developers were
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active as reviewers in that period. Thanks go to all contributors who
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helped shape this release.
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As with 4.1, the release tarballs are available at
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http://www.coreboot.org/releases/. There's also a 4.2 tag and branch in
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the git repository.
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This marks the first release that features a changelog comparing it to
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the previous release. There was some limited testing to make sure that
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the code is usable, and it boots on some devices. A structured test plan
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will only become part of the release procedure of future versions. I'm
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grateful to Martin for assembling this release's changelog.
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This is also the first release that will be followed by the removal of
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old, unused code. There will be a policy on how to announce deprecation
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and removal of mainboard and chipset code for future releases.
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Regards,
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Patrick
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Log of commit d5e6618a4f076610e683b174c4dd5108d960c785 to
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commit 439a527014fa0cb3e4ef60ba59e5c57c737b4444
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Changes between 4.1 and 4.2
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---------------------------
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### Build system:
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* Store a minimized coreboot config file in cbfs instead of the full
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config
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* Store the payload config and revision in CBFS when that info is
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available
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* Add -compression option for cbfs-files-y. Valid entries are now -file,
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-type, -align, and -compression
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* Change Microcode inclusion method from building .h files to pre-built
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binaries
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* Update Builder tests for each commit to test utilities and run lint
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tools
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* Many other small makefile and build changes and fixes
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* Remove expert mode as a Kconfig option
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### Utilities:
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* Many fixes and updates to many utilities (158 total commits)
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* ifdtool: Update for skylake, handle region masks correctly
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* crossgcc: Update to gcc 5.2.0
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* kconfig: Add strict mode to fail on kconfig errors and warnings
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* vgabios: Significant fixes to remove issues in linking into coreboot
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code
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* Add script to parse MAINTAINERS file
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* Add Kconfig lint tool
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* Create a common library to share coreboot routines with utilities
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#### Significant changes and cleanup to cbfstool (81 commits)
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* Update cbfstool to change the internal location of FSP binaries when
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adding them
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* Decompress stage files on extraction and turn them into ELF binaries
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* Header sizes are now variable, containing extended attributes
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* Add compression tags to all cbfs headers so all cbfs files can be
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compressed
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* Add and align CBFS components in one pass instead of two
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* Add XIP support for X86 to relocate the romstage when it'™s added
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* Removed locate command as it'™s no longer needed
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* Add bootblock and cbfs_header file types so the master header knows
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about them
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* Prefer FMAP data to CBFS master header if FMAP data exists
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* Add hashes to cbfs file metadata for verification of images
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### Payloads:
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* SeaBIOS: update stable release from 1.7.5 to 1.8.2
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* Libpayload had some significant changes (61 commits). Major changes:
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* Add support for fmap tables
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* Add support for SuperSpeed (3.0) USB hubs
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* Updates and bugfixes for DesignWare OTG controller (DWC2)
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* Add video_printf to print text with specified foreground & background
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colors
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* Updates to match changes to cbfs/cbfstool
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* Add cbgfx, a library to show graphics and text on a display
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* Read cbfs offset and size from sysinfo when available
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### Vendorcode:
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* fsp_baytrail: Support Baytrail FSP Gold 4 release
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* AMD binary PI: add support for fan control
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* Work to get AMD AGESA to compile correctly as 64-bit code
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* Add standalone (XIP) verstage support for x86 to verify romstage
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### Mainboards:
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* New Mainboards:
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* apple/macbookair4_2 * Sandy/Ivy Bridge with Panther / Cougar point
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chipset
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* asus/kgpe-d16 - AMD Family 10, SB700/SR5650 platform
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* emulation/spike-riscv - RISCV virtualized platform
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* google/chell - Intel Skylake chrome platform
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* google/cyan - Intel Braswell chrome platform
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* google/glados - Intel Skylake chrome platform
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* google/lars - Intel Skylake chrome platform
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* intel/kunimitsu - Intel Skylake chrome platform
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* intel/sklrvp - Intel Skylake reference platform
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* intel/strago - Intel Braswell chrome platform
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* Cleanups of many mainboards - several patches each for:
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* amd/bettong
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* getac/p470
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* google/auron, google/smaug and google/veyron_rialto
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* pcengines/apu1
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* siemens/mc_tcu3
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* Combine the google/veyron_(jerry, mighty, minnie, pinkie, shark &
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speedy) mainboards into the single google/veyron mainboard directory
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### Console:
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* Add EM100 ˜hyper term" spi console support in ramstage & smm
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* Add console support for verstage
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### ARM:
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* armv7: use asm coded memory operations for 32/16 bit read/write
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* Many cleanups to the nvidia tegra chips (40 patches)
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### RISC-V:
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* Add trap handling
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* Add virtual Memory setup
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### X86:
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* Remove and re-add Rangeley and Ivy Bridge / panther point FSP
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platforms
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* Update microcode update parser to use stock AMD microcode blobs from
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CBFS
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* ACPI: Align FACS to 64 byte boundary. Fixes FWTS error
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* AMD/SB700: Init devices in early boot, restore power state after power
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failure. Add IDE/SATA asl code
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* Add initial support for AMD Socket G34 processors
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* Add tick frequency to timestamp table to calculate boot times more
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accurately
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* Unify X86 romstage / ramstage linking to match other platforms
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* Start preparing X86 bootblock for non-memory-mapped BIOS media
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* cpu/amd/car: Add Suspend to RAM (S3) support
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* Native VGA init fixes on several platforms
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* Significant updates to FSP 1.1 code for cleanup and cbfstool changes
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* SMMhandler: on i945..nehalem, crash if LAPIC overlaps with ASEG to
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prevent the memory sinkhole smm hack
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### Drivers:
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* Add native text mode support for the Aspeed AST2050
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* w83795: Add support for for fan control and voltage monitoring
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* Intel GMA ACPI consolidation and improvements
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* Set up the 8254 timer before running option ROMs
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* Resource allocator: Page align memory mapped PCI resources
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### Lib:
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* Derive fmap name from offset/size
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* Several edid fixes
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* Updates to cbfs matching changes in cbfstool
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Submodules:
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----------
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### 3rdparty/blobs:
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Total commits: 16
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Log of commit 61d663e3 to commit aab093f0
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* AMD Merlin Falcon: Update to CarrizoPI 1.1.0.0 (Binary PI 1.4)
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* AMD Steppe Eagle: Update to MullinsPI 1.0.0.A (Binary PI 1.1)
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* Update microcode to binary blobs. Remove old .h microcode files
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### 3rdparty/arm-trusted-firmware:
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* No Changes
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### 3rdparty/vboot:
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Total commits: 41
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Log of commit fbf631c8 to commit d6723ed1
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* Update the code to determine the write protect line gpio value
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* Several updates to futility and image_signing scripts
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* Update crossystem to accommodate Android mosys location
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* Support reboot requested by secdata
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* Add NV flag to default boot legacy OS
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### util/nvidia/cbootimage:
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* No Changes
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