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coreboot-kgpe-d16/src/include/spd_bin.h

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lib: Add library to handle SPD data in CBFS or DIMM Add library to: 1. add spd.bin in cbfs, generated from mainboard/spd/*.spd.hex files. 2. runtime get spd data with spd index as input. 3. fetch spd over smbus using early smbus functions. Change-Id: I44fe1cdb883dd1037484d4bb5c87d2d4f9862bf8 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17434 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-10-26 16:13:14 +02:00
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SPD_BIN_H
#define SPD_BIN_H
#include <arch/early_variables.h>
#include <stdint.h>
#include <commonlib/region.h>
#define SPD_PAGE_LEN 256
#define SPD_PAGE_LEN_DDR4 512
#define SPD_PAGE_0 (0x6C >> 1)
#define SPD_PAGE_1 (0x6E >> 1)
#define SPD_DRAM_TYPE 2
#define SPD_DRAM_DDR3 0x0B
#define SPD_DRAM_LPDDR3_INTEL 0xF1
#define SPD_DRAM_LPDDR3_JEDEC 0x0F
#define SPD_DRAM_DDR4 0x0C
#define SPD_DENSITY_BANKS 4
#define SPD_ADDRESSING 5
#define SPD_ORGANIZATION 7
#define SPD_BUS_DEV_WIDTH 8
#define DDR3_SPD_PART_OFF 128
#define DDR3_SPD_PART_LEN 18
#define LPDDR3_SPD_PART_OFF 128
#define LPDDR3_SPD_PART_LEN 18
#define DDR4_SPD_PART_OFF 329
#define DDR4_SPD_PART_LEN 20
#define LPDDR4_SPD_PART_OFF 329
#define LPDDR4_SPD_PART_LEN 20
struct spd_block {
lib/spd_bin: make SMBus SPD addresses an input Instead of assuming the mapping of dimm number to SPD SMBus address, allow the mainboard to provide its own mapping. That way, global resources of empty SPD contents aren't wasted in order to address a dimm on a mainboard that doesn't meet the current assumption. Change-Id: Id0e79231dc2303373badaae003038a1ac06a5635 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19915 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
2017-05-25 16:36:06 +02:00
u8 addr_map[CONFIG_DIMM_MAX];
lib: Add library to handle SPD data in CBFS or DIMM Add library to: 1. add spd.bin in cbfs, generated from mainboard/spd/*.spd.hex files. 2. runtime get spd data with spd index as input. 3. fetch spd over smbus using early smbus functions. Change-Id: I44fe1cdb883dd1037484d4bb5c87d2d4f9862bf8 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17434 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-10-26 16:13:14 +02:00
u8 *spd_array[CONFIG_DIMM_MAX];
/* Length of each dimm */
u16 len;
};
void print_spd_info(uint8_t spd[]);
/* Return 0 on success & -1 on failure */
int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index);
void dump_spd_info(struct spd_block *blk);
void get_spd_smbus(struct spd_block *blk);
ddr3 spd: move accessor code into lib/spd_bin.c It's an attempt to consolidate the access code, even if there are still multiple implementations in the code. Change-Id: I4b2b9cbc24a445f8fa4e0148f52fd15950535240 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18265 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-01-28 15:59:25 +01:00
/* expects SPD size to be 128 bytes, reads from "spd.bin" in CBFS and
verifies the checksum. Only available if CONFIG_DIMM_SPD_SIZE == 128. */
int read_ddr3_spd_from_cbfs(u8 *buf, int idx);
lib: Add library to handle SPD data in CBFS or DIMM Add library to: 1. add spd.bin in cbfs, generated from mainboard/spd/*.spd.hex files. 2. runtime get spd data with spd index as input. 3. fetch spd over smbus using early smbus functions. Change-Id: I44fe1cdb883dd1037484d4bb5c87d2d4f9862bf8 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17434 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-10-26 16:13:14 +02:00
#endif