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coreboot-kgpe-d16/Documentation/releases/coreboot-4.16-relnotes.md

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Documentation/releases: Add 4.16 release notes template Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Change-Id: I42ce11914d7e7b32017747bbc6d3c7ac77e2868b Reviewed-on: https://review.coreboot.org/c/coreboot/+/58758 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-29 20:00:50 +02:00
Upcoming release - coreboot 4.16
================================
Doc/releases/coreboot-4.16-relnotes.md: Fix typo Change-Id: I7189ac62d5ec826cf0377712941ba227362c1e09 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59122 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-10 18:37:05 +01:00
The 4.16 release is planned for February, 2022.
Documentation/releases: Update 4.16 target date and cadence information Change-Id: I6c8327a7cf47217d32359b304b21e806c10dcc62 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59022 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-11-08 19:52:36 +01:00
We are increasing the frequency of releases in order to enable others to release quarterly on
a fresher version of coreboot.
Documentation/releases: Add 4.16 release notes template Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Change-Id: I42ce11914d7e7b32017747bbc6d3c7ac77e2868b Reviewed-on: https://review.coreboot.org/c/coreboot/+/58758 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-10-29 20:00:50 +02:00
Update this document with changes that should be in the release notes.
* Please use Markdown.
* See the past few release notes for the general format.
* The chip and board additions and removals will be updated right
before the release, so those do not need to be added.
Significant changes
-------------------
### Add significant changes here
Documentation/releases: Update 4.16 release notes * Add StarBook Mk V as new mainboard * Add option to disable Intel Management Engine via HECI Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9675a6a8960d93ae6de285d8b25ffc48a763483e Reviewed-on: https://review.coreboot.org/c/coreboot/+/59564 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-23 09:13:38 +01:00
### Option to disable Intel Management Engine
Documentation/releases: Improve CSME section 1. Fix typo in *based* 2. Use official spelling for Alder Lake 3. Mention *Converged Security* 4. Capitalize CMOS Change-Id: I36eac6f017229a3e9261e0eb84371421927e1cae Fixes: 941239d54d (Documentation/releases: Update 4.16 release notes) Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60133 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-15 10:12:37 +01:00
Disable the Intel (Converged Security) Management Engine ((CS)ME) via HECI based
on Intel Core processors from Skylake to Alder Lake. State is set based on a
CMOS value of `me_state`. A value of `0` will result in a (CS)ME state of `0`
(working) and value of `1` will result in a (CS)ME state of `3` (disabled). For
an example CMOS layout and more info, see
[cse.c](../../src/soc/intel/common/block/cse/cse.c).