2008-09-02 18:06:22 +02:00
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/*
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*
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2023-05-19 22:19:56 +02:00
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* Copyright (C) 2013 secunet Security Networks AG
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2008-09-02 18:06:22 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2010-03-25 23:17:36 +01:00
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//#define USB_DEBUG
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2023-05-19 22:19:56 +02:00
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#include <stdint.h>
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#include <stdbool.h>
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#include <usb/usb.h>
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#include "generic_hub.h"
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2010-06-07 15:58:17 +02:00
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#include "uhci_private.h"
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2023-05-19 22:19:56 +02:00
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#include "uhci.h"
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2008-09-02 18:06:22 +02:00
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2023-05-19 22:19:56 +02:00
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#define PORTSC(p) (PORTSC1 + ((p) - 1) * sizeof(uint16_t))
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#define PORTSC_CCS (1 << 0)
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#define PORTSC_CSC (1 << 1)
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#define PORTSC_PED (1 << 2)
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#define PORTSC_PEDC (1 << 3)
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#define PORTSC_LSDA (1 << 8)
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#define PORTSC_PR (1 << 9)
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#define PORTSC_SUSP (1 << 12)
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#define PORTSC_SC_BITS (PORTSC_CSC | PORTSC_PEDC)
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2008-09-02 18:06:22 +02:00
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2023-05-19 22:19:56 +02:00
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static int
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uhci_rh_port_status_changed(usbdev_t *const dev, const int port)
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{
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port));
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const bool changed = portsc & (PORTSC_CSC | PORTSC_PEDC);
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/* always clear all the status change bits */
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uhci_reg_write16(dev->controller, PORTSC(port), portsc);
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2008-09-02 18:06:22 +02:00
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2023-05-19 22:19:56 +02:00
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return changed;
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}
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static int
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uhci_rh_port_connected(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port));
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return !!(portsc & PORTSC_CCS);
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2008-09-02 18:06:22 +02:00
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}
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2023-05-19 22:19:56 +02:00
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static int
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uhci_rh_port_enabled(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port));
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return !(portsc & PORTSC_SUSP) && (portsc & PORTSC_PED);
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2008-09-02 18:06:22 +02:00
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}
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2023-05-19 22:19:56 +02:00
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static usb_speed
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uhci_rh_port_speed(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port));
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const bool low_speed = portsc & PORTSC_LSDA;
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return low_speed ? LOW_SPEED : FULL_SPEED;
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2008-09-02 18:06:22 +02:00
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}
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static int
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2023-05-19 22:19:56 +02:00
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uhci_rh_enable_port(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port)) & ~PORTSC_SUSP;
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uhci_reg_write16(dev->controller, PORTSC(port), portsc & ~(PORTSC_SC_BITS | PORTSC_SUSP));
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uhci_reg_write16(dev->controller, PORTSC(port), (portsc & ~PORTSC_SC_BITS) | PORTSC_PED);
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return 0;
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2008-09-02 18:06:22 +02:00
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}
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2023-05-19 22:19:56 +02:00
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static int
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uhci_rh_disable_port(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port));
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uhci_reg_write16(dev->controller, PORTSC(port), portsc & ~(PORTSC_SC_BITS | PORTSC_PED));
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return 0;
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2008-09-02 18:06:22 +02:00
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}
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2023-05-19 22:19:56 +02:00
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static int
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uhci_rh_reset_port(usbdev_t *const dev, const int port)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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const u16 portsc = uhci_reg_read16(dev->controller, PORTSC(port)) & ~PORTSC_PR;
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/* Trigger port reset. */
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uhci_reg_write16(dev->controller, PORTSC(port), portsc | PORTSC_PR);
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/* Wait for 15ms (usb20 spec 11.5.1.5: reset should take 10 to 20ms). */
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mdelay(15);
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/* Clear port reset. */
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uhci_reg_write16(dev->controller, PORTSC(port), portsc & ~PORTSC_PR);
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udelay(10); /* Linux waits this long. */
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/* Enable port. */
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uhci_reg_write16(dev->controller, PORTSC(port), portsc | PORTSC_PED);
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/* Clear status-change bits one last time. */
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uhci_reg_write16(dev->controller, PORTSC(port), portsc | PORTSC_PED | PORTSC_SC_BITS);
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return 0;
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2008-09-02 18:06:22 +02:00
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}
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2023-05-19 22:19:56 +02:00
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static const generic_hub_ops_t uhci_rh_ops = {
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.hub_status_changed = NULL,
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.port_status_changed = uhci_rh_port_status_changed,
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.port_connected = uhci_rh_port_connected,
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.port_in_reset = NULL,
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.port_enabled = uhci_rh_port_enabled,
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.port_speed = uhci_rh_port_speed,
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.enable_port = uhci_rh_enable_port,
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.disable_port = uhci_rh_disable_port,
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.start_port_reset = NULL,
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.reset_port = uhci_rh_reset_port,
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};
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2008-09-02 18:06:22 +02:00
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void
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2022-08-10 08:59:18 +02:00
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uhci_rh_init(usbdev_t *dev)
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2008-09-02 18:06:22 +02:00
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{
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2023-05-19 22:19:56 +02:00
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/* we can set them here because a root hub _really_ shouldn't appear elsewhere */
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2008-09-02 18:06:22 +02:00
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dev->address = 0;
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dev->hub = -1;
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dev->port = -1;
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2023-05-19 22:19:56 +02:00
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generic_hub_init(dev, 2, &uhci_rh_ops);
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usb_debug("UHCI: root hub init done\n");
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2008-09-02 18:06:22 +02:00
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}
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