34 lines
1.1 KiB
C
34 lines
1.1 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SOUTHBRIDGE_INTEL_I82801GX_CHIP_H
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#define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H
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struct southbridge_intel_i82801gx_config {
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uint32_t ide_legacy_combined;
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uint32_t ide_enable_primary;
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uint32_t ide_enable_secondary;
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uint32_t sata_ahci;
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};
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extern struct chip_operations southbridge_intel_i82801gx_ops;
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#endif /* SOUTHBRIDGE_INTEL_I82801GX_CHIP_H */
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