34 lines
1 KiB
C
34 lines
1 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <soc/ramstage.h>
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static struct device_operations dsp_dev_ops = {
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.read_resources = &pci_dev_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.scan_bus = &scan_static_bus,
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.ops_pci = &soc_pci_ops,
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};
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static const struct pci_driver skylake_dsp __pci_driver = {
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.ops = &dsp_dev_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x9d70
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};
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