2010-01-24 02:47:58 +01:00
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/*
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* This file is part of the superiotool project.
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*
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* Copyright (C) 2009 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "superiotool.h"
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#define DEVICE_ID_VT82C686_REG 0xe0
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#define DEVICE_REV_VT82C686_REG 0xe1
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2017-10-31 09:25:05 +01:00
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#define DEVICE_ID_VT1211_REG 0x20
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#define DEVICE_REV_VT1211_REG 0x21
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2010-01-24 02:47:58 +01:00
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static const struct superio_registers reg_table[] = {
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2017-10-31 09:25:18 +01:00
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{0x3c00, "VT82C686A/VT82C686B", {
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{EOT}}},
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{0x3c01, "VT1211", {
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2017-10-31 09:25:23 +01:00
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{NOLDN, NULL,
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{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
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0x2e,0x2f,EOT},
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{0x3c,0x01,0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,EOT}},
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{0x0, "Floppy Disk Controller (FDC)",
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
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{0x00,0x03,0xf0,0x06,0x01,0x00,0x00,EOT}},
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{0x1, "Parallel Port (PP)",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x03,0x03,0x78,0x05,0x00,0x00,EOT}},
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{0x2, "Serial Port 1 (UART1)",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x00,EOT}},
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{0x3, "Serial Port 2 (UART2)",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x02,0xf8,0x03,0x00,EOT}},
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{0x6, "MIDI",
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{0x30,0x60,0x61,0x70,EOT},
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{0x00,0x03,0x30,0x00,EOT}},
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{0x7, "Game Port (GMP)",
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{0x30,0x60,0x61,EOT},
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{0x00,0x02,0x00,EOT}},
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{0x8, "GPIO",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
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{0x00,0xe9,0x00,0x00,0x00,0x00,0x00,EOT}},
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{0x9, "Watch Dog (WDG)",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0xea,0x00,0x00,0x00,EOT}},
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{0xa, "Wake-up Control (WUC)",
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{0x30,0x60,0x61,0x70,EOT},
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{0x00,0xeb,0x00,0x00,EOT}},
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{0xb, "Hardware Monitor (HM)",
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{0x30,0x60,0x61,0x70,EOT},
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{0x00,0xec,0x00,0x00,EOT}},
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{0xc, "Very Fast IR (VFIR)",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x00,0xe8,0x00,0x00,0x06,0x00,EOT}},
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{0xd, "Flash ROM (ROM)",
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{0x30,0xf0,EOT},
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{0x01,0x00,EOT}},
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2010-01-24 02:47:58 +01:00
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{EOT}}},
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{EOT}
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};
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static uint8_t vt82c686_conf = 0;
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static int enter_conf_mode_via_vt82c686(void)
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{
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struct pci_dev *dev;
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dev = pci_dev_find(0x1106, 0x0686);
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if (!dev) {
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if (verbose)
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printf(" PCI device 1106:0686 not found.\n");
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return 1;
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}
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vt82c686_conf = pci_read_byte(dev, 0x85);
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if (verbose)
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printf(" Super I/O %sabled, Super I/O configuration %sabled\n",
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(vt82c686_conf & (1 << 0)) ? "en" : "dis",
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(vt82c686_conf & (1 << 1)) ? "en" : "dis");
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/* If the Super I/O is not enabled, skip it. */
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if (!(vt82c686_conf & (1 << 0)))
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return 1;
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/* Enable Super I/O configuration mode. */
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pci_write_byte(dev, 0x85, vt82c686_conf | (1 << 1));
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return 0;
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}
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static void exit_conf_mode_via_vt82c686(void)
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{
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struct pci_dev *dev;
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dev = pci_dev_find(0x1106, 0x0686);
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if (!dev) {
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printf("Bug: PCI device 1106:0686 not found during shutdown.\n"
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"Please report to coreboot@coreboot.org.\n");
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return;
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}
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/* Restore (disable?) Super I/O configuration mode setting. */
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pci_write_byte(dev, 0x85, vt82c686_conf);
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}
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void probe_idregs_via(uint16_t port)
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{
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uint16_t id;
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2017-10-31 09:25:18 +01:00
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uint8_t devid;
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2010-01-24 02:47:58 +01:00
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uint8_t rev;
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2017-10-31 09:25:05 +01:00
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if (port == 0x3f0) {
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2017-10-31 09:25:18 +01:00
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probing_for("VIA", "(init=vt82c686) ", port);
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2017-10-31 09:25:05 +01:00
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if (enter_conf_mode_via_vt82c686())
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return;
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2017-10-31 09:25:18 +01:00
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devid = regval(port, DEVICE_ID_VT82C686_REG);
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2017-10-31 09:25:05 +01:00
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rev = regval(port, DEVICE_REV_VT82C686_REG);
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2017-10-31 09:25:18 +01:00
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id = devid << 8;
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2017-10-31 09:25:05 +01:00
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if (superio_unknown(reg_table, id)) {
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if (verbose)
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2017-10-31 09:25:18 +01:00
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printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev);
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2017-10-31 09:25:05 +01:00
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} else {
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printf("Found VIA %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
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get_superio_name(reg_table, id), devid, rev, port);
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2017-10-31 09:25:05 +01:00
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chip_found = 1;
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}
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2010-01-24 02:47:58 +01:00
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exit_conf_mode_via_vt82c686();
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2017-10-31 09:25:05 +01:00
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if (chip_found)
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return;
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} else {
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2017-10-31 09:25:18 +01:00
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probing_for("VIA", "(init=0x87,0x87) ", port);
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2017-10-31 09:25:05 +01:00
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enter_conf_mode_winbond_fintek_ite_8787(port);
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2017-10-31 09:25:18 +01:00
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devid = regval(port, DEVICE_ID_VT1211_REG);
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2017-10-31 09:25:05 +01:00
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rev = regval(port, DEVICE_REV_VT1211_REG);
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2017-10-31 09:25:18 +01:00
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id = (devid << 8) | 1;
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2017-10-31 09:25:05 +01:00
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if (superio_unknown(reg_table, id)) {
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if (verbose)
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2017-10-31 09:25:18 +01:00
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printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev);
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2017-10-31 09:25:05 +01:00
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} else {
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2017-10-31 09:25:18 +01:00
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printf("Found VIA %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
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get_superio_name(reg_table, id), devid, rev, port);
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2017-10-31 09:25:05 +01:00
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chip_found = 1;
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2017-10-31 09:25:18 +01:00
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dump_superio("VIA", reg_table, port, id, LDN_SEL);
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2017-10-31 09:25:05 +01:00
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}
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2010-01-24 02:47:58 +01:00
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}
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2017-10-31 09:25:05 +01:00
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exit_conf_mode_winbond_fintek_ite_8787(port);
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2010-01-24 02:47:58 +01:00
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}
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void print_via_chips(void)
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{
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print_vendor_chips("VIA", reg_table);
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}
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