coreboot-kgpe-d16/src/soc/intel/skylake/bootblock/timestamp.inc

/*
 * Store the initial timestamp for booting in mmx registers. This works
 * because the bootblock isn't being compiled with MMX support so mm0 and
 * mm1 will be preserved into romstage.
 */
	.code32

.global stash_timestamp
stash_timestamp:

	/* Save the BIST value */
	movl	%eax, %ebp

	finit
	rdtsc
	movd	%eax, %mm0
	movd	%edx, %mm1

	/* Restore the BIST value to %eax */
	movl	%ebp, %eax
soc/intel: Add Skylake SOC support Add the files to support the Skylake SOC. Matches chromium tree at 927026db BRANCH=none BUG=None TEST=Build and run on a Skylake platform Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10341 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> 2015-05-13 03:23:27 +02:00			`/*`
			`* Store the initial timestamp for booting in mmx registers. This works`
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC Use the Broadwell implementation as the comparison base for Skylake. BRANCH=none BUG=None TEST=None Change-Id: I22eb55ea89eb0d6883f98e4c72a6d243e819e6d8 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10340 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> 2015-05-13 03:19:47 +02:00			`* because the bootblock isn't being compiled with MMX support so mm0 and`
soc/intel: Add Skylake SOC support Add the files to support the Skylake SOC. Matches chromium tree at 927026db BRANCH=none BUG=None TEST=Build and run on a Skylake platform Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10341 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> 2015-05-13 03:23:27 +02:00			`* mm1 will be preserved into romstage.`
			`*/`
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC Use the Broadwell implementation as the comparison base for Skylake. BRANCH=none BUG=None TEST=None Change-Id: I22eb55ea89eb0d6883f98e4c72a6d243e819e6d8 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10340 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> 2015-05-13 03:19:47 +02:00			`.code32`

			`.global stash_timestamp`
			`stash_timestamp:`

			`/* Save the BIST value */`
			`movl %eax, %ebp`

			`finit`
			`rdtsc`
			`movd %eax, %mm0`
			`movd %edx, %mm1`

			`/* Restore the BIST value to %eax */`
			`movl %ebp, %eax`