55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <string.h>
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#include <smbios.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <pc80/mc146818rtc.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include "onboard.h"
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void mainboard_suspend_resume(void)
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{
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/* Call SMM finalize() handlers before resume */
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outb(0xcb, 0xb2);
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}
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static void mainboard_init(device_t dev)
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{
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lan_init();
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}
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// mainboard_enable is executed as first thing after
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// enumerate_buses().
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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