68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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* Copyright (C) 2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include <delay.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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/* NOTE: This code uses global variables, so it can not be used during
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* memory init.
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*/
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#define FSB_CLOCK_STS 0xcd
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static u32 timer_fsb = 200; // default to 200MHz
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void init_timer(void)
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{
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msr_t fsb_clock_sts;
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/* Set the apic timer to no interrupts and periodic mode */
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lapic_write(LAPIC_LVTT, (1 << 17) | (1<< 16) | (0 << 12) | (0 << 0));
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/* Set the divider to 1, no divider */
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lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1);
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/* Set the initial counter to 0xffffffff */
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lapic_write(LAPIC_TMICT, 0xffffffff);
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/* Set FSB frequency to a reasonable value */
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fsb_clock_sts = rdmsr(FSB_CLOCK_STS);
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switch ((fsb_clock_sts.lo >> 4) & 0x07) {
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case 0: timer_fsb = 266; break;
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case 1: timer_fsb = 133; break;
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case 2: timer_fsb = 200; break;
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case 3: timer_fsb = 166; break;
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case 5: timer_fsb = 100; break;
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}
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}
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void udelay(u32 usecs)
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{
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u32 start, value, ticks;
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/* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz */
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ticks = usecs * timer_fsb;
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start = lapic_read(LAPIC_TMCCT);
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do {
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value = lapic_read(LAPIC_TMCCT);
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} while((start - value) < ticks);
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}
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