141 lines
3.1 KiB
Text
141 lines
3.1 KiB
Text
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config SOC_NVIDIA_TEGRA210
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV4
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select ARCH_VERSTAGE_ARMV4
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select ARCH_ROMSTAGE_ARMV4
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select ARCH_RAMSTAGE_ARMV8_64
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select ARCH_ARM64_CPU_CORTEX_A57
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select ARCH_ARM64_CORTEX_A57_POWER_DOWN_SUPPORT
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select BOOTBLOCK_CONSOLE
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select GIC
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select HAVE_MONOTONIC_TIMER
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select GENERIC_UDELAY
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select HAVE_HARD_RESET
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select HAVE_UART_SPECIAL
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select ARM_BOOTBLOCK_CUSTOM
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select ARM64_USE_ARM_TRUSTED_FIRMWARE
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select HAS_PRECBMEM_TIMESTAMP_REGION
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select CHROMEOS_RAMOOPS_NON_ACPI
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select GENERIC_GPIO_LIB
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if SOC_NVIDIA_TEGRA210
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config MAINBOARD_DO_DSI_INIT
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bool "Use dsi graphics interface"
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depends on MAINBOARD_DO_NATIVE_VGA_INIT
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default n
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help
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Initialize dsi display
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config MAINBOARD_DO_SOR_INIT
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bool "Use dp graphics interface"
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depends on MAINBOARD_DO_NATIVE_VGA_INIT
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default n
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help
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Initialize dp display
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config BOOTBLOCK_CPU_INIT
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string
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default "soc/nvidia/tegra210/bootblock.c"
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help
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CPU/SoC-specific bootblock code. This is useful if the
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bootblock must load microcode or copy data from ROM before
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searching for the bootblock.
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config MAX_CPUS
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int
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default 4
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choice CONSOLE_SERIAL_TEGRA210_UART_CHOICES
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prompt "Serial Console UART"
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default CONSOLE_SERIAL_TEGRA210_UARTA
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depends on CONSOLE_SERIAL_UART
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config CONSOLE_SERIAL_TEGRA210_UARTA
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bool "UARTA"
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help
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Serial console on UART A.
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config CONSOLE_SERIAL_TEGRA210_UARTB
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bool "UARTB"
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help
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Serial console on UART B.
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config CONSOLE_SERIAL_TEGRA210_UARTC
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bool "UARTC"
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help
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Serial console on UART C.
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config CONSOLE_SERIAL_TEGRA210_UARTD
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bool "UARTD"
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help
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Serial console on UART D.
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config CONSOLE_SERIAL_TEGRA210_UARTE
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bool "UARTE"
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help
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Serial console on UART E.
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endchoice
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config CONSOLE_SERIAL_TEGRA210_UART_ADDRESS
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hex
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depends on CONSOLE_SERIAL_UART
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default 0x70006000 if CONSOLE_SERIAL_TEGRA210_UARTA
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default 0x70006040 if CONSOLE_SERIAL_TEGRA210_UARTB
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default 0x70006200 if CONSOLE_SERIAL_TEGRA210_UARTC
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default 0x70006300 if CONSOLE_SERIAL_TEGRA210_UARTD
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default 0x70006400 if CONSOLE_SERIAL_TEGRA210_UARTE
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help
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Map the UART names to the respective MMIO addres.
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config BOOTROM_SDRAM_INIT
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bool "SoC BootROM does SDRAM init with full BCT"
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default n
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help
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Use during Foster LPDDR4 bringup.
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config TRUSTZONE_CARVEOUT_SIZE_MB
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hex "Size of Trust Zone region"
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default 0x14
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help
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Size of Trust Zone area in MiB to reserve in memory map.
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# Default to 700MHz. This value is based on nv bootloader setting.
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config PLLX_KHZ
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int
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default 700000
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endif
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config HAVE_MTC
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bool "Add external Memory controller Training Code binary"
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default n
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depends on USE_BLOBS
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help
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Select this option to add emc training firmware
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if HAVE_MTC
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config MTC_FILE
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string "tegra mtc firmware filename"
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default "tegra_mtc.bin"
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help
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The filename of the mtc firmware
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config MTC_DIRECTORY
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string "Directory where MTC firmware file is located"
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default "."
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help
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Path to directory where MTC firmware file is located.
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config MTC_ADDRESS
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hex
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default 0x81000000
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help
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The DRAM location where MTC firmware to be loaded in. This location
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needs to be consistent with the location defined in tegra_mtc.ld
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endif # HAVE_MTC
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