49 lines
807 B
C
49 lines
807 B
C
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#ifndef CPU_X86_CACHE
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#define CPU_X86_CACHE
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static inline unsigned long read_cr0(void)
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{
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unsigned long cr0;
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asm volatile ("movl %%cr0, %0" : "=r" (cr0));
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return cr0;
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}
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static inline void write_cr0(unsigned long cr0)
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{
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asm volatile ("movl %0, %%cr0" : : "r" (cr0));
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}
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static inline void invd(void)
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{
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asm volatile("invd" ::: "memory");
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}
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static inline void wbinvd(void)
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{
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asm volatile ("wbinvd");
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}
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static inline void enable_cache(void)
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{
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 &= 0x9fffffff;
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write_cr0(cr0);
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}
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static inline void disable_cache(void)
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{
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/* Disable and write back the cache */
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 |= 0x40000000;
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wbinvd();
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write_cr0(cr0);
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wbinvd();
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}
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#ifndef __ROMCC__
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void x86_enable_cache(void);
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#endif /* !__ROMCC__ */
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#endif /* CPU_X86_CACHE */
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