48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <baytrail/pmc.h>
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#include <baytrail/reset.h>
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void cold_reset(void)
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{
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/* S0->S5->S0 trip. */
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outb(RST_CPU | SYS_RST | FULL_RST, RST_CNT);
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}
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void warm_reset(void)
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{
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/* PMC_PLTRST# asserted. */
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outb(RST_CPU | SYS_RST, RST_CNT);
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}
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void soft_reset(void)
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{
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/* Sends INIT# to CPU */
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outb(RST_CPU, RST_CNT);
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}
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void hard_reset(void)
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{
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/* Don't power cycle on hard_reset(). It's not really clear what the
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* semantics should be for the meaning of hard_reset(). */
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warm_reset();
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}
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