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coreboot-kgpe-d16/spd/lp4x/set-0/parts_spd_manifest.generate...

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spd: Generate SPDs under spd/ using unified spd_gen tool Use the new unified version of the spd_gen tool to generate all LP4x and DDR4 SPDs, storing them in a new spd/ directory. Storing them in a common location allows platforms with the same SPD requirements to share SPD files, reducing duplication compared to storing SPDs in soc/ and mainboard/ directories. For each memory technology there are multiple sets of SPDs. Each set corresponds to a set of platforms with different SPD requirements, e.g. due to different memory training code expectations. A manifest file (platforms_manifest.generated.txt) lists the platform -> set mappings. Commands used to generate SPDs: cp util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt \ spd/lp4x/memory_parts.json cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \ spd/ddr4/memory_parts.json util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4 BUG=b:191776301 TEST=None Signed-off-by: Reka Norman <rekanorman@google.com> Change-Id: Iac82847a1a0c1f2e7271d0d3b3a7261849813a24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-09-09 05:08:19 +02:00
# Generated by:
# util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x
H9HCNNNBKMMLXR-NEE,spd-1.hex
H9HCNNNFAMMLXR-NEE,spd-2.hex
K4U6E3S4AA-MGCL,spd-1.hex
K4UBE3D4AA-MGCL,spd-3.hex
MT53E1G32D2NP-046 WT:A,spd-4.hex
MT53E1G32D2NP-046 WT:B,spd-3.hex
H9HKNNNCRMBVAR-NEH,spd-1.hex
MT53E1G64D4SQ-046 WT:A,spd-4.hex
MT53E512M32D2NP-046 WT:F,spd-1.hex
NT6AP256T32AV-J2,spd-5.hex
K4U6E3S4AA-MGCR,spd-1.hex
MT53E512M32D2NP-046 WT:E,spd-1.hex
H9HCNNNCPMMLXR-NEE,spd-3.hex
K4UBE3D4AA-MGCR,spd-3.hex
MT53E512M64D4NW-046 WT:E,spd-1.hex
MT53E1G64D8NW-046 WT:E,spd-3.hex
H9HCNNNCRMBLPR-NEE,spd-1.hex
H9HCNNNFBMBLPR-NEE,spd-3.hex
MT53D1G64D4NW-046 WT:A,spd-4.hex
MT53D512M64D4NW-046 WT:F,spd-1.hex
NT6AP256T32AV-J1,spd-6.hex
MT53E1G32D4NQ-046 WT:E,spd-3.hex
MT53E2G32D4NQ-046 WT:A,spd-7.hex
MT53E512M32D1NP-046 WT:B,spd-1.hex
H54G46CYRBX267,spd-1.hex
H54G56CYRBX247,spd-3.hex
K4U6E3S4AB-MGCL,spd-1.hex
K4UBE3D4AB-MGCL,spd-3.hex
spd/lp4x: Generate initial SPD for MT53E2G32D4NQ-046 WT:C Generate the initial SPD for MT53E2G32D4NQ-046 WT:C BUG=b:220804962 TEST=util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x Change-Id: I3e2b377f1d6d4b1fa45614ad2f3de81eef17c2b8 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-02-17 10:49:15 +01:00
MT53E2G32D4NQ-046 WT:C,spd-7.hex
spd/lp4x: Generate initial SPD for H54G68CYRBX248 Generate initial SPD for H54G68CYRBX248 BUG=b:239888704 BRANCH=firmware-brya-14505.B TEST=util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x Change-Id: Iae75391938446e9ee387b779ddcaa378a23ee52e Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66070 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-07-22 09:10:01 +02:00
H54G68CYRBX248,spd-2.hex
spd/lp4x: Generate initial SPD for K4UCE3Q4AB-MGCL Generate initial SPD for Samsung K4UCE3Q4AB-MGCL BUG=b:281943392 BRANCH=firmware-brya-14505.B TEST=util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x Change-Id: I0a860f3f9c307e70f63a53435cc26e6f278d0a17 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-05-11 09:35:56 +02:00
K4UCE3Q4AB-MGCL,spd-2.hex